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Author |
Carrio, F. |
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Title |
The Data Acquisition System for the ATLAS Tile Calorimeter Phase-II Upgrade Demonstrator |
Type |
Journal Article |
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Year |
2022 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
69 |
Issue |
4 |
Pages |
687-695 |
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Keywords |
Large Hadron Collider; Data acquisition; Field programmable gate arrays; Clocks; Detectors; Computer architecture; Microprocessors; ATLAS tile calorimeter (TileCal); data acquisition (DAQ) systems; field-programmable gate array (FPGA); high energy physics; high-speed electronics |
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Abstract |
The tile calorimeter (TileCal) is the central hadronic calorimeter of the ATLAS experiment at the large hadron collider (LHC). In 2025, the LHC will be upgraded leading to the high luminosity LHC (HL-LHC). The HL-LHC will deliver an instantaneous luminosity up to seven times larger than the LHC nominal luminosity. The ATLAS Phase-II upgrade (2025-2027) will accommodate the subdetectors to the HL-LHC requirements. As part of this upgrade, the majority of the TileCal on-detector and off-detector electronics will be replaced using a new readout strategy, where the on-detector electronics will digitize and transmit digitized detector data to the off-detector electronics at the bunch crossing frequency (40 MHz). In the counting rooms, the off-detector electronics will compute reconstructed trigger objects for the first-level trigger and will store the digitized samples in pipelined buffers until the reception of a trigger acceptance signal. The off-detector electronics will also distribute the LHC clock to the on-detector electronics embedded within the digital data stream. The TileCal Phase-II upgrade project has undertaken an extensive research and development program that includes the development of a Demonstrator module to evaluate the performance of the new clock and readout architecture envisaged for the HL-LHC. The Demonstrator module equipped with the latest version of the on-detector electronics was built and inserted into the ATLAS experiment. The Demonstrator module is operated and read out using a Tile PreProcessor (TilePPr) Demonstrator which enables backward compatibility with the present ATLAS Trigger and Data AcQuisition (TDAQ), and the timing, trigger, and command (TTC) systems. This article describes in detail the main hardware and firmware components of the clock distribution and data acquisition systems for the Demonstrator module, focusing on the TilePPr Demonstrator. |
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Address |
[Carrio, F.] Inst Fis Corpuscular CSIC UV, Paterna 46980, Spain, Email: fernando.carrio@cern.ch |
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Ieee-Inst Electrical Electronics Engineers Inc |
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English |
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0018-9499 |
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Notes |
WOS:000803113800016 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
no |
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Call Number |
IFIC @ pastor @ |
Serial |
5244 |
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Author |
Gonzalez-Iglesias, D.; Esperante, D.; Gimeno, B.; Boronat, M.; Blanch, C.; Fuster-Martinez, N.; Martinez-Reviriego, P.; Martin-Luna, P.; Fuster, J. |
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Title |
Analytical RF Pulse Heating Analysis for High Gradient Accelerating Structures |
Type |
Journal Article |
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Year |
2021 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
68 |
Issue |
2 |
Pages |
78-91 |
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Keywords |
RF accelerating structures; RF pulse heating; thermal analysis |
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Abstract |
The main aim of this work is to present a simple method, based on analytical expressions, for obtaining the temperature increase due to the Joule effect inside the metallic walls of an RF accelerating component. This technique relies on solving the 1-D heat-transfer equation for a thick wall, considering that the heat sources inside the wall are the ohmic losses produced by the RF electromagnetic fields penetrating the metal with finite electrical conductivity. Furthermore, it is discussed how the theoretical expressions of this method can be applied to obtain an approximation to the temperature increase in realistic 3-D RF accelerating structures, taking as an example the cavity of an RF electron photoinjector and a traveling wave linac cavity. These theoretical results have been benchmarked with numerical simulations carried out with commercial finite-element method (FEM) software, finding good agreement among them. Besides, the advantage of the analytical method with respect to the numerical simulations is evidenced. In particular, the model could be very useful during the design and optimization phase of RF accelerating structures, where many different combinations of parameters must be analyzed in order to obtain the proper working point of the device, allowing to save time and speed up the process. However, it must be mentioned that the method described in this article is intended to provide a quick approximation to the temperature increase in the device, which of course is not as accurate as the proper 3-D numerical simulations of the component. |
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Address |
[Gonzalez-Iglesias, D.; Esperante, D.; Gimeno, B.; Boronat, M.; Blanch, C.; Fuster-Martinez, N.; Martinez-Reviriego, P.; Martin-Luna, P.; Fuster, J.] UV, CSIC, Inst Fis Corpuscular IFIC, Valencia 46980, Spain, Email: daniel.gonzalez-iglesias@uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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English |
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ISSN |
0018-9499 |
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Notes |
WOS:000619349900001 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
no |
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Call Number |
IFIC @ pastor @ |
Serial |
4720 |
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Author |
Egea Canet, F.J. et al; Gadea, A.; Huyuk, T. |
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Title |
A New Front-End High-Resolution Sampling Board for the New-Generation Electronics of EXOGAM2 and NEDA Detectors |
Type |
Journal Article |
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Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
62 |
Issue |
3 |
Pages |
1056-1062 |
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Keywords |
Acquisition in HP-Ge detectors; high-speed ADCs; low-noise electronics design |
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Abstract |
This paper presents the final design and results of the FADC Mezzanine for the EXOGAM (EXOtic GAMma array spectrometer) and NEDA (Neutron Detector Array) detectors. The measurements performed include those of studying the effective number of bits, the energy resolution using HP-Ge detectors, as well as timing histograms and discrimination performance. Finally, the conclusion shows how a common digitizing device has been integrated in the experimental environment of two very different detectors which combine both low-noise acquisition and fast sampling rates. Not only the integration fulfilled the expected specifications on both systems, but it also showed how a study of synergy between detectors could lead to the reduction of resources and time by applying a common strategy. |
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Address |
[Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
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English |
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0018-9499 |
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Notes |
WOS:000356458000028 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
2278 |
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Author |
Egea Canet, F.J. et al; Gadea, A.; Huyuk, T. |
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Title |
Digital Front-End Electronics for the Neutron Detector NEDA |
Type |
Journal Article |
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Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
62 |
Issue |
3 |
Pages |
1063-1069 |
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Keywords |
Digital systems; front-end electronics; neutron detectors; neutron-gamma discrimination |
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Abstract |
This paper presents the design of the NEDA (Neutron Detector Array) electronics, a first attempt to involve the use of digital electronics in large neutron detector arrays. Starting from the front-end modules attached to the PMTs (PhotoMultiplier Tubes) and ending up with the data processing workstations, a comprehensive electronic system capable of dealing with the acquisition and pre-processing of the neutron array is detailed. Among the electronic modules required, we emphasize the front-end analog processing, the digitalization, digital pre-processing and communications firmware, as well as the integration of the GTS (Global Trigger and Synchronization) system, already used successfully in AGATA (Advanced Gamma Tracking Array). The NEDA array will be available for measurements in 2016. |
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Address |
[Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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English |
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0018-9499 |
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Notes |
WOS:000356458000029 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
2279 |
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Author |
Carrio, F.; Castillo Gimenez, V.; Ferrer, A.; Gonzalez, V.; Higon-Rodriguez, E.; Marin, C.; Moreno, P.; Sanchis, E.; Solans, C.; Valero, A.; Valls Ferrer, J.A. |
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Title |
Optical Link Card Design for the Phase II Upgrade of TileCal Experiment |
Type |
Journal Article |
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Year |
2011 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
58 |
Issue |
4 |
Pages |
1657-1663 |
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Keywords |
High energy physics instrumentation computing; optical-fiber communication high-speed electronics; programmable logic devices |
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Abstract |
This paper presents the design of an optical link card developed in the frame of the R&D activities for the phase 2 upgrade of the TileCal experiment. This board, that is part of the evaluation of different technologies for the final choice in the next years, is designed as a mezzanine that can work independently or be plugged in the optical multiplexer board of the TileCal backend electronics. It includes two SNAP 12 optical connectors able to transmit and receive up to 75 Gb/s and one SFP optical connector for lower speeds and compatibility with existing hardware as the read out driver. All processing is done in a Stratix II GX field-programmable gate array (FPGA). Details are given on the hardware design, including signal and power integrity analysis, needed when working with these high data rates and on firmware development to obtain the best performance of the FPGA signal transceivers and for the use of the GBT protocol. |
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Address |
[Carrio, F; Gonzalez, V; Marin, C; Sanchis, E] Univ Valencia, Dept Elect Engn, E-46100 Valencia, Spain, Email: vicente.gonzalez@uv.es |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
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Language |
English |
Summary Language |
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Series Editor |
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ISSN |
0018-9499 |
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Area |
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Expedition |
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Conference |
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Notes |
WOS:000293975700037 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
no |
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Call Number |
IFIC @ elepoucu @ |
Serial |
722 |
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Author |
Miñano, M. |
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Title |
Radiation Hard Silicon Strips Detectors for the SLHC |
Type |
Journal Article |
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Year |
2011 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
58 |
Issue |
3 |
Pages |
1135-1140 |
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Keywords |
High energy physics; microstrip; radiation detectors; silicon; SLHC |
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Abstract |
While the Large Hadron Collider (LHC) began taking data in 2009, scenarios for a machine upgrade to achieve a much higher luminosity are being developed. In the current planning, it is foreseen to increase the luminosity of the LHC at CERN around 2018. As radiation damage scales with integrated luminosity, the particle physics experiments will need to be equipped with a new generation of radiation hard detectors. This article reports on the status of the R&D projects on radiation hard silicon strips detectors for particle physics, linked to the Large Hadron Collider Upgrade, super-LHC (sLHC) of the ATLAS microstrip detector. The primary focus of this report is on measuring the radiation hardness of the silicon materials and the detectors under study. This involves designing silicon detectors, irradiating them to the sLHC radiation levels and studying their performance as particle detectors. The most promising silicon detector for the different radiation levels in the different regions of the ATLAS microstrip detector will be presented. Important challenges related to engineering layout, powering, cooling and reading out a very large strip detector are presented. Ideas on possible schemes for the layout and support mechanics will be shown. |
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Address |
IFIC UV CSIC, Inst Fis Corpuscular, E-46071 Valencia, Spain, Email: mercedes.minano@ific.uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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English |
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0018-9499 |
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Notes |
ISI:000291659300001 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
no |
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Call Number |
IFIC @ pastor @ |
Serial |
651 |
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Author |
Belver, D.; Cabanelas, P.; Castro, E.; Garzon, J.A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M. |
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Title |
Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall |
Type |
Journal Article |
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Year |
2010 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
57 |
Issue |
5 |
Pages |
2848-2856 |
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Keywords |
Charge to width algorithm; fast amplifying and digitizing electronics; front-end electronics; HADES; time of flight; timing RPC |
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Abstract |
A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m(2) divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel Daughter BOard(DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade [1]. The commissioning of the whole RPC wall is finished and the 6 sectors are already mounted in their final position in the HADES spectrometer and ready to take data during the beam-times foreseen for 2010. |
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Address |
[Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.] Univ Santiago Compostela, LabCAF, Santiago De Compostela 15782, Spain, Email: daniel.belver@usc.es |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
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English |
Summary Language |
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0018-9499 |
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Conference |
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Notes |
ISI:000283440400007 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ elepoucu @ |
Serial |
349 |
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Author |
Bouhova-Thacker, E.; Kostyukhin, V.; Koffas, T.; Liebig, W.; Limper, M.; Piacquadio, G.N.; Prokofiev, K.; Weiser, C.; Wildauer, A. |
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Title |
Expected Performance of Vertex Reconstruction in the ATLAS Experiment at the LHC |
Type |
Journal Article |
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Year |
2010 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
57 |
Issue |
2 |
Pages |
760-767 |
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Keywords |
Data analysis; data reconstruction; high energy physics; pattern recognition; reconstruction algorithms; tracking; vertex detectors |
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Abstract |
In the harsh environment of the Large Hadron Collider at CERN (design luminosity of 10(34) cm(-2) s(-1)) efficient reconstruction of vertices is crucial for many physics analyses. Described in this paper is the expected performance of the vertex reconstruction used in the ATLAS experiment. The algorithms for the reconstruction of primary and secondary vertices as well as for finding photon conversions and vertex reconstruction in jets are described. The implementation of vertex algorithms which follows a very modular design based on object-oriented C++ is presented. A user-friendly concept allows event reconstruction and physics analyses to compare and optimize their choice among different vertex reconstruction strategies. The performance of implemented algorithms has been studied on a variety of Monte Carlo samples and results are presented. |
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Address |
[Bouhova-Thacker, Eva] Univ Lancaster, Lancaster LA1 4YB, England, Email: bouhova@mail.cern.ch |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
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English |
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0018-9499 |
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Conference |
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Notes |
ISI:000276679200006 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
260 |
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Author |
Tetrault, M.A.; Oliver, J.F.; Bergeron, M.; Lecomte, R.; Fontaine, R. |
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Title |
Real Time Coincidence Detection Engine for High Count Rate Timestamp Based PET |
Type |
Journal Article |
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Year |
2010 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
57 |
Issue |
1 |
Pages |
117-124 |
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Keywords |
Coincidence detection; Positron Emission Tomography (PET) |
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Abstract |
Coincidence engines follow two main implementation flows: timestamp based systems and AND-gate based systems. The latter have been more widespread in recent years because of its lower cost and high efficiency. However, they are highly dependent on the selected electronic components, they have limited flexibility once assembled and they are customized to fit a specific scanner's geometry. Timestamp based systems are gathering more attention lately, especially with high channel count fully digital systems. These new systems must however cope with important singles count rates. One option is to record every detected event and postpone coincidence detection offline. For daily use systems, a real time engine is preferable because it dramatically reduces data volume and hence image preprocessing time and raw data management. This paper presents the timestamp based coincidence engine for the LabPET(TM), a small animal PET scanner with up to 4608 individual readout avalanche photodiode channels. The engine can handle up to 100 million single events per second and has extensive flexibility because it resides in programmable logic devices. It can be adapted for any detector geometry or channel count, can be ported to newer, faster programmable devices and can have extra modules added to take advantage of scanner-specific features. Finally, the user can select between full processing mode for imaging protocols and minimum processing mode to study different approaches for coincidence detection with offline software. |
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Address |
[Tetrault, M. -A.; Fontaine, R.] Univ Sherbrooke, Dept Elect & Comp Engn, Sherbrooke, PQ J1K 2R1, Canada, Email: Marc-Andre.Tetrault@USherbrooke.ca |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
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Language |
English |
Summary Language |
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Series Volume |
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Edition |
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ISSN |
0018-9499 |
ISBN |
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Conference |
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Notes |
ISI:000274391000016 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ elepoucu @ |
Serial |
500 |
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Author |
Monerris-Belda, O.; Cervera Marin, R.; Rodriguez Jodar, M.; Diaz-Caballero, E.; Alcaide Guillen, C.; Petit, J.; Boria, V.E.; Gimeno, B.; Raboso, D. |
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Title |
High Power RF Discharge Detection Technique Based on the In-Phase and Quadrature Signals |
Type |
Journal Article |
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Year |
2021 |
Publication |
IEEE Transactions on Microwave Theory and Techniques |
Abbreviated Journal |
IEEE Trans. Microw. Theory Tech. |
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Volume |
69 |
Issue |
12 |
Pages |
5429-5438 |
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Keywords |
Radio frequency; Microwave theory and techniques; Electric breakdown; Discharges (electric); Noise measurement; Sensitivity; RF signals; Corona; microwave devices; multipactor; radio frequency (RF) breakdown; RF high power |
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Abstract |
High power radio frequency (RF) breakdown testing is a subject of great relevance in the space industry, due to the increasing need of higher transmission power and smaller devices. This work presents a novel RF breakdown detection system, which monitors the same parameters as the microwave nulling system but with several advantages. Where microwave nulling-a de facto standard in RF breakdown testing-is narrowband and requires continuous tuning to keep its sensitivity, the proposed technique is broadband and maintains its performance for any RF signal. On top of that, defining the detection threshold is cumbersome due to the lack of an international standardized criterion. Small responses may appear in the detection system during the test and, sometimes, it is not possible to determine if these are an actual RF breakdown or random noise. This new detection system uses a larger analysis bandwidth, thus reducing the cases in which a small response is difficult to be classified. The proposed detection method represents a major step forward in high power testing as it runs without human intervention, warning the operator or decreasing the RF power automatically much faster than any human operator. |
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Address |
[Monerris-Belda, Oscar; Cervera Marin, Raul; Rodriguez Jodar, Miguel; Petit, John] Val Space Consortium, Valencia 46022, Spain, Email: oscar.monerris@val-space.com |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
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Language |
English |
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ISSN |
0018-9480 |
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Notes |
WOS:000725804500027 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
5042 |
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