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Author |
Carrio, F.; Castillo Gimenez, V.; Ferrer, A.; Gonzalez, V.; Higon-Rodriguez, E.; Marin, C.; Moreno, P.; Sanchis, E.; Solans, C.; Valero, A.; Valls Ferrer, J.A. |
![find record details (via OpenURL) openurl](img/xref.gif)
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Title |
Optical Link Card Design for the Phase II Upgrade of TileCal Experiment |
Type |
Journal Article |
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Year |
2011 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
58 |
Issue |
4 |
Pages |
1657-1663 |
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Keywords |
High energy physics instrumentation computing; optical-fiber communication high-speed electronics; programmable logic devices |
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Abstract |
This paper presents the design of an optical link card developed in the frame of the R&D activities for the phase 2 upgrade of the TileCal experiment. This board, that is part of the evaluation of different technologies for the final choice in the next years, is designed as a mezzanine that can work independently or be plugged in the optical multiplexer board of the TileCal backend electronics. It includes two SNAP 12 optical connectors able to transmit and receive up to 75 Gb/s and one SFP optical connector for lower speeds and compatibility with existing hardware as the read out driver. All processing is done in a Stratix II GX field-programmable gate array (FPGA). Details are given on the hardware design, including signal and power integrity analysis, needed when working with these high data rates and on firmware development to obtain the best performance of the FPGA signal transceivers and for the use of the GBT protocol. |
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Address |
[Carrio, F; Gonzalez, V; Marin, C; Sanchis, E] Univ Valencia, Dept Elect Engn, E-46100 Valencia, Spain, Email: vicente.gonzalez@uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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WOS:000293975700037 |
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no |
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yes |
International Collaboration |
no |
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Call Number |
IFIC @ elepoucu @ |
Serial |
722 |
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Author |
Dimmock, M.R.; Nikulin, D.A.; Gillam, J.E.; Nguyen, C.V. |
![find record details (via OpenURL) openurl](img/xref.gif)
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Title |
An OpenCL Implementation of Pinhole Image Reconstruction |
Type |
Journal Article |
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Year |
2012 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
59 |
Issue |
4 |
Pages |
1738-1749 |
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Keywords |
Collimator; GPU; OpenCL; pinhole |
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Abstract |
AC++/OpenCL software platform for emission image reconstruction of data from pinhole cameras has been developed. The software incorporates a new, accurate but computationally costly, probability distribution function for operating on list-mode data from detector stacks. The platform architecture is more general than previous works, supporting advanced models such as arbitrary probability distribution, collimation geometry and detector stack geometry. The software was implemented such that all performance-critical operations occur on OpenCL devices, generally GPUs. The performance of the software is tested on several commodity CPU and GPU devices. |
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Address |
[Dimmock, Matthew R.; Nikulin, Dmitri A.; Nguyen, Chuong V.] Monash Univ, Sch Phys, Melbourne, Vic 3800, Australia, Email: matthew.dimmock@synchrotron.org.au; |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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WOS:000307893900034 |
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no |
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yes |
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yes |
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Call Number |
IFIC @ pastor @ |
Serial |
1145 |
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Author |
DEPFET collaboration (Alonso, O. et al); Boronat, M.; Esperante-Pereira, D.; Fuster, J.; Garcia, I.G.; Lacasta, C.; Oyanguren, A.; Ruiz, P.; Timon, G.; Vos, M. |
![goto web page (via DOI) doi](img/doi.gif)
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Title |
DEPFET Active Pixel Detectors for a Future Linear e(+)e(-) Collider |
Type |
Journal Article |
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Year |
2013 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
60 |
Issue |
2 |
Pages |
1457-1465 |
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Keywords |
Active pixel sensor; DEPFET; linear collider; vertex detector |
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Abstract |
The DEPFET collaboration develops highly granular, ultra-transparent active pixel detectors for high-performance vertex reconstruction at future collider experiments. The characterization of detector prototypes has proven that the key principle, the integration of a first amplification stage in a detector-grade sensor material, can provide a comfortable signal to noise ratio of over 40 for a sensor thickness of 50-75 μm. ASICs have been designed and produced to operate a DEPFET pixel detector with the required read-out speed. A complete detector concept is being developed, including solutions for mechanical support, cooling, and services. In this paper, the status of the DEPFET R & D project is reviewed in the light of the requirements of the vertex detector at a future linear e(+)e(-) collider. |
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[Alonso, O.; Casanova, R.; Dieguez, A.] Univ Barcelona, E-08028 Barcelona, Spain, Email: marcel.vos@ific.uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000320856800029 |
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no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
1489 |
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Permanent link to this record |
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Author |
Boronat, M.; Marinas, C.; Frey, A.; Garcia, I.; Schwenker, B.; Vos, M.; Wilk, F. |
![goto web page (via DOI) doi](img/doi.gif)
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Title |
Physical Limitations to the Spatial Resolution of Solid-State Detectors |
Type |
Journal Article |
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Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
62 |
Issue |
1 |
Pages |
381-386 |
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Keywords |
Charged particle tracking; silicon detectors; solid state devices |
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Abstract |
In this paper we explore the effect of delta-ray emission and fluctuations in the signal deposition on the detection of charged particles in silicon-based detectors. We show that these two effects ultimately limit the resolution that can be achieved by interpolation of the signal in finely segmented position-sensitive solid-state devices. |
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Address |
[Boronat, M.; Garcia, I.; Vos, M.] IFIC UVEG CSIC, E-46980 Valencia, Spain, Email: marcel.vos@ific.uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000349672900025 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
2140 |
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Permanent link to this record |
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Author |
Egea Canet, F.J. et al; Gadea, A.; Huyuk, T. |
![find record details (via OpenURL) openurl](img/xref.gif)
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Title |
A New Front-End High-Resolution Sampling Board for the New-Generation Electronics of EXOGAM2 and NEDA Detectors |
Type |
Journal Article |
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Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
62 |
Issue |
3 |
Pages |
1056-1062 |
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Keywords |
Acquisition in HP-Ge detectors; high-speed ADCs; low-noise electronics design |
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Abstract |
This paper presents the final design and results of the FADC Mezzanine for the EXOGAM (EXOtic GAMma array spectrometer) and NEDA (Neutron Detector Array) detectors. The measurements performed include those of studying the effective number of bits, the energy resolution using HP-Ge detectors, as well as timing histograms and discrimination performance. Finally, the conclusion shows how a common digitizing device has been integrated in the experimental environment of two very different detectors which combine both low-noise acquisition and fast sampling rates. Not only the integration fulfilled the expected specifications on both systems, but it also showed how a study of synergy between detectors could lead to the reduction of resources and time by applying a common strategy. |
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Address |
[Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000356458000028 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
2278 |
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Permanent link to this record |
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Author |
Egea Canet, F.J. et al; Gadea, A.; Huyuk, T. |
![find record details (via OpenURL) openurl](img/xref.gif)
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Title |
Digital Front-End Electronics for the Neutron Detector NEDA |
Type |
Journal Article |
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Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
62 |
Issue |
3 |
Pages |
1063-1069 |
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Keywords |
Digital systems; front-end electronics; neutron detectors; neutron-gamma discrimination |
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Abstract |
This paper presents the design of the NEDA (Neutron Detector Array) electronics, a first attempt to involve the use of digital electronics in large neutron detector arrays. Starting from the front-end modules attached to the PMTs (PhotoMultiplier Tubes) and ending up with the data processing workstations, a comprehensive electronic system capable of dealing with the acquisition and pre-processing of the neutron array is detailed. Among the electronic modules required, we emphasize the front-end analog processing, the digitalization, digital pre-processing and communications firmware, as well as the integration of the GTS (Global Trigger and Synchronization) system, already used successfully in AGATA (Advanced Gamma Tracking Array). The NEDA array will be available for measurements in 2016. |
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Address |
[Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000356458000029 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
2279 |
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Permanent link to this record |
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Author |
Barrientos, D.; Bellato, M.; Bazzacco, D.; Bortolato, D.; Cocconi, P.; Gadea, A.; Gonzalez, V.; Gulmini, M.; Isocrate, R.; Mengoni, D.; Pullia, A.; Recchia, F.; Rosso, D.; Sanchis, E.; Toniolo, N.; Ur, C.A.; Valiente-Dobon, J.J. |
![goto web page (via DOI) doi](img/doi.gif)
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Title |
Performance of the Fully Digital FPGA-Based Front-End Electronics for the GALILEO Array |
Type |
Journal Article |
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Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
62 |
Issue |
6 |
Pages |
3134-3139 |
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Keywords |
FPGA; front-end electronics; gamma-ray spectroscopy; germanium detectors |
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Abstract |
In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. This work presents the first results of the digital FEE system coupled with a GALILEO germanium detector, which has demonstrated the capability to achieve an energy resolution of 1.53% at an energy of 1.33 MeV, similar to the one obtained with a conventional analog system. While keeping a good performance in terms of energy resolution, digital electronics will allow to instrument the full GALILEO array with a versatile system with high integration and low power consumption and costs. |
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Address |
[Barrientos, D.; Bortolato, D.; Cocconi, P.; Gulmini, M.; Rosso, D.; Toniolo, N.; Valiente-Dobon, J. J.] Ist Nazl Fis Nucl, Lab Nazl Legnaro, I-35020 Padua, Italy, Email: diego.barrientos@lnl.infn.it |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000372013500005 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
2612 |
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Permanent link to this record |
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Author |
Marco-Hernandez, R.; Bau, M.; Ferrari, M.; Ferrari, V.; Pedersen, F.; Soby, L. |
![find record details (via OpenURL) openurl](img/xref.gif)
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Title |
A Low-Noise Charge Amplifier for the ELENA Trajectory, Orbit, and Intensity Measurement System |
Type |
Journal Article |
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Year |
2017 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
64 |
Issue |
9 |
Pages |
2465-2473 |
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Keywords |
Beam position monitor (BPM); charge sensitive amplifier; instrumentation for accelerators; low-noise amplifier; particle accelerators; printed circuits |
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Abstract |
A low-noise head amplifier has been developed for the extra low energy antiproton ring beam trajectory, orbit, and intensity measurement system at CERN. This system is based on 24 double-electrode electrostatic beam position monitors installed around the ring. A head amplifier is placed close to each beam position monitor to amplify the electrode signals and generate a difference and a sum signal. These signals are sent to the digital acquisition system, about 50 m away from the ring, where they are digitized and further processed. The beam position can be measured by dividing the difference signal by the sum signal while the sum signal gives information relative to the beam intensity. The head amplifier consists of two discrete charge preamplifiers with junction field effect transistor (JFET) inputs, a sum and a difference stage, and two cable drivers. Special attention has been paid to the amplifier printed circuit board design to minimize the parasitic capacitances and inductances at the charge amplifier stages to meet the gain and noise requirements. The measurements carried out on the head amplifier showed a gain of 40.5 and 46.5 dB for the sum and difference outputs with a bandwidth from 200 Hz to 75 MHz and an input voltage noise density lower than 400 pV/v Hz. Twenty head amplifiers have been already installed in the ring and they have been used to detect the first beam signals during the first commissioning stage in November 2016. |
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Address |
[Marco-Hernandez, Ricardo; Pedersen, Flemming; Soby, Lars] CERN, CH-1217 Meyrin, Switzerland, Email: rmarco@ific.uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000411029500002 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
yes |
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Call Number |
IFIC @ pastor @ |
Serial |
3298 |
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Permanent link to this record |
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Author |
Aliaga, R.J. |
![find record details (via OpenURL) openurl](img/xref.gif)
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Title |
Real-Time Estimation of Zero Crossings of Sampled Signals for Timing Using Cubic Spline Interpolation |
Type |
Journal Article |
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Year |
2017 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
64 |
Issue |
8 |
Pages |
2414-2422 |
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Keywords |
Digital arithmetic; digital circuits; digital timing; field-programmable gate array (FPGA); interpolation; signal processing algorithms; splines time estimation; time resolution |
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Abstract |
A scheme is proposed for hardware estimation of the location of zero crossings of sampled signals with subsample resolution for timing applications, which consists of interpolating the signal with a cubic spline near the zero crossing and then finding the root of the resulting polynomial. An iterative algorithm based on the bisection method is presented that obtains one bit of the result per step and admits an efficient digital implementation using fixed-point representation. In particular, the root estimation iteration involves only two additions, and the initial values can be obtained from finite impulse response (FIR) filters with certain symmetry properties. It is shown that this allows online real-time estimation of timestamps in free-running sampling detector systems with improved accuracy with respect to the more common linear interpolation. The method is evaluated with simulations using ideal and real timing signals, and estimates are given for the resource usage and speed of its implementation. |
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Address |
[Aliaga, Ramon J.] Inst Fis Corpuscular, Paterna 46980, Spain, Email: raalva@upvnet.upv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000411027700008 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
no |
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Call Number |
IFIC @ pastor @ |
Serial |
3301 |
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Permanent link to this record |
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Author |
Gonzalez-Iglesias, D.; Esperante, D.; Gimeno, B.; Boronat, M.; Blanch, C.; Fuster-Martinez, N.; Martinez-Reviriego, P.; Martin-Luna, P.; Fuster, J. |
![find record details (via OpenURL) openurl](img/xref.gif)
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Title |
Analytical RF Pulse Heating Analysis for High Gradient Accelerating Structures |
Type |
Journal Article |
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Year |
2021 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
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Volume |
68 |
Issue |
2 |
Pages |
78-91 |
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Keywords |
RF accelerating structures; RF pulse heating; thermal analysis |
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Abstract |
The main aim of this work is to present a simple method, based on analytical expressions, for obtaining the temperature increase due to the Joule effect inside the metallic walls of an RF accelerating component. This technique relies on solving the 1-D heat-transfer equation for a thick wall, considering that the heat sources inside the wall are the ohmic losses produced by the RF electromagnetic fields penetrating the metal with finite electrical conductivity. Furthermore, it is discussed how the theoretical expressions of this method can be applied to obtain an approximation to the temperature increase in realistic 3-D RF accelerating structures, taking as an example the cavity of an RF electron photoinjector and a traveling wave linac cavity. These theoretical results have been benchmarked with numerical simulations carried out with commercial finite-element method (FEM) software, finding good agreement among them. Besides, the advantage of the analytical method with respect to the numerical simulations is evidenced. In particular, the model could be very useful during the design and optimization phase of RF accelerating structures, where many different combinations of parameters must be analyzed in order to obtain the proper working point of the device, allowing to save time and speed up the process. However, it must be mentioned that the method described in this article is intended to provide a quick approximation to the temperature increase in the device, which of course is not as accurate as the proper 3-D numerical simulations of the component. |
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Address |
[Gonzalez-Iglesias, D.; Esperante, D.; Gimeno, B.; Boronat, M.; Blanch, C.; Fuster-Martinez, N.; Martinez-Reviriego, P.; Martin-Luna, P.; Fuster, J.] UV, CSIC, Inst Fis Corpuscular IFIC, Valencia 46980, Spain, Email: daniel.gonzalez-iglesias@uv.es |
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Ieee-Inst Electrical Electronics Engineers Inc |
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0018-9499 |
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Notes |
WOS:000619349900001 |
Approved |
no |
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Is ISI |
yes |
International Collaboration |
no |
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Call Number |
IFIC @ pastor @ |
Serial |
4720 |
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Permanent link to this record |