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Hiti, B., Cindro, V., Gorisek, A., Franks, M., Marco-Hernandez, R., Kramberger, G., et al. (2021). Characterisation of analogue front end and time walk in CMOS active pixel sensor. J. Instrum., 16(12), P12020–12pp.
Abstract: In this work we investigated a method to determine time walk in an active silicon pixel sensor prototype using Edge-TCT with infrared laser charge injection. Samples were investigated before and after neutron irradiation to 5 . 10(14) n(eq)/cm(2). Threshold, noise and calibration of the analogue front end were determined with external charge injection. A spatially sensitive measurement of collected charge and time walk was carried out with Edge-TCT, showing a uniform charge collection and output delay in pixel centre. On pixel edges charge sharing was observed due to finite beam width resulting in smaller signals and larger output delay. Time walk below 25 ns was observed for charge above 2000 e(-) at a threshold above the noise level. Time walk measurement with external charge injection yielded identical results.
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Kuehn, S. et al, Bernabeu, J., Lacasta, C., Marco-Hernandez, R., Rodriguez Rodriguez, D., Santoyo, D., et al. (2018). Prototyping of petalets for the Phase-II upgrade of the silicon strip tracking detector of the ATLAS experiment. J. Instrum., 13, T03004–22pp.
Abstract: In the high luminosity era of the Large Hadron Collider, the instantaneous luminosity is expected to reach unprecedented values, resulting in about 200 proton-proton interactions in a typical bunch crossing. To cope with the resultant increase in occupancy, bandwidth and radiation damage, the ATLAS Inner Detector will be replaced by an all-silicon system, the Inner Tracker (ITk). The ITk consists of a silicon pixel and a strip detector and exploits the concept of modularity. Prototyping and testing of various strip detector components has been carried out. This paper presents the developments and results obtained with reduced-size structures equivalent to those foreseen to be used in the forward region of the silicon strip detector. Referred to as petalets, these structures are built around a composite sandwich with embedded cooling pipes and electrical tapes for routing the signals and power. Detector modules built using electronic flex boards and silicon strip sensors are glued on both the front and back side surfaces of the carbon structure. Details are given on the assembly, testing and evaluation of several petalets. Measurement results of both mechanical and electrical quantities are shown. Moreover, an outlook is given for improved prototyping plans for large structures.
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Kuehn, S. et al, Bernabeu, J., Lacasta, C., Marco-Hernandez, R., Santoyo, D., Solaz, C., et al. (2017). Prototyping of hybrids and modules for the forward silicon strip tracking detector for the ATLAS Phase-II upgrade. J. Instrum., 12, P05015–26pp.
Abstract: For the High-Luminosity upgrade of the Large Hadron Collider an increased instantaneous luminosity of up to 7.5 . 10(34) cm(-2) s(-1), leading to a total integrated luminosity of up to 3000 fb(-1), is foreseen. The current silicon and transition radiation tracking detectors of the ATLAS experiment will be unable to cope with the increased track densities and radiation levels, and will need to be replaced. The new tracking detector will consist entirely of silicon pixel and strip detectors. In this paper, results on the development and tests of prototype components for the new silicon strip detector in the forward regions (end-caps) of the ATLAS detector are presented. Flex-printed readout boards with fast readout chips, referred to as hybrids, and silicon detector modules are investigated. The modules consist of a hybrid glued onto a silicon strip sensor. The channels on both are connected via wire-bonds for readout and powering. Measurements of important performance parameters and a comparison of two possible readout schemes are presented. In addition, the assembly procedure is described and recommendations for further prototyping are derived.
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Mandic, I., Cindro, V., Debevc, J., Gorisek, A., Hiti, B., Kramberger, G., et al. (2022). Study of neutron irradiation effects in Depleted CMOS detector structures. J. Instrum., 17(3), P03030–13pp.
Abstract: In this paper the results of Edge-TCT and I-V measurements with passive test structures made in LFoundry 150 nm HV-CMOS process on p-type substrates with different initial resistivities ranging from 0.5 to 3 k Omega cm are presented. Samples were irradiated with reactor neutrons up to a fluence of 2.10(15) n(eq)/cm(2). The depletion depth was measured with Edge-TCT. The effective space charge concentration N-eff was estimated from the dependence of the depletion depth on bias voltage and studied as a function of neutron fluence. The dependence of N-eff on fluence changes with initial acceptor concentration in agreement with other measurements with p-type silicon. A long term accelerated annealing study of N-eff and detector current up to 1280 minutes at 60 degrees C was made. It was found that N-eff and current in reverse biased detector behave as expected for irradiated silicon.
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Marco-Hernandez, R. (2011). Development of a beam test telescope based on the Alibava readout system. J. Instrum., 6, C01002–7pp.
Abstract: A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectronica (CNM) of Barcelona and Instituto de Fisica Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two Beetle ASICs for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two Beetle ASICs. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.
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Marco-Hernandez, R., Alves, D., Angoletta, M. E., Marqversen, O., Molendijk, J., Oponowicz, E., et al. (2017). The AD and ELENA orbit, trajectory and intensity measurement systems. J. Instrum., 12, P07024–24pp.
Abstract: This paper describes the new Antiproton Decelerator (AD) orbit measurement system and the Extra Low ENergy Antiproton ring (ELENA) orbit, trajectory and intensity measurement system. The AD machine at European Organization for Nuclear Research (CERN) is presently being used to decelerate antiprotons from 3.57 GeV/c to 100 MeV/c for matter vs anti-matter comparative studies. The ELENA machine, presently under commissioning, has been designed to provide an extra deceleration stage down to 13.7 MeV/c. The AD orbit system is based on 32 horizontal and 27 vertical electrostatic Beam Position Monitor (BPM) fitted with existing low noise front-end amplifiers while the ELENA system consists of 24 BPMs equipped with new low-noise head amplifiers. In both systems the front-end amplifiers generate a difference (delta) and a sum (sigma) signal which are sent to the digital acquisition system, placed tens of meters away from the AD or ELENA rings, where they are digitized and further processed. The beam position is calculated by dividing the difference signal by the sum signal either using directly the raw digitized data for measuring the turn-by-turn trajectory in the ELENA system or after down-mixing the signals to baseband for the orbit measurement in both machines. The digitized sigma signal will be used in the ELENA system to calculate the bunched beam intensity and the Schottky parameters with coasting beam after passing through different signal processing chain. The digital acquisition arrangement for both systems is based on the same hardware, also used in the ELENA Low Level Radio Frequency (LLRF) system, which follows the VME Switched Serial (VXS) enhancement of the Versa Module Eurocard 64x extension (VME64x) standard and includes VITA 57 standard Field Programmable Gate Array Mezzanine Card (FMC). The digital acquisition Field Programmable Gate Array (FPGA) andDigital Signal Processor (DSP) firmware sharesmany common functionalities with the LLRF system but has been tailored for this measurement application in particular. Specific control and acquisition software has been developed for these systems. Both systems are installed in AD and ELENA. The AD orbit system currently measures the orbit in AD while the ELENA system is being used in the commissioning of the ELENA ring.
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Marco-Hernandez, R., Bau, M., Ferrari, M., Ferrari, V., Pedersen, F., & Soby, L. (2017). A Low-Noise Charge Amplifier for the ELENA Trajectory, Orbit, and Intensity Measurement System. IEEE Trans. Nucl. Sci., 64(9), 2465–2473.
Abstract: A low-noise head amplifier has been developed for the extra low energy antiproton ring beam trajectory, orbit, and intensity measurement system at CERN. This system is based on 24 double-electrode electrostatic beam position monitors installed around the ring. A head amplifier is placed close to each beam position monitor to amplify the electrode signals and generate a difference and a sum signal. These signals are sent to the digital acquisition system, about 50 m away from the ring, where they are digitized and further processed. The beam position can be measured by dividing the difference signal by the sum signal while the sum signal gives information relative to the beam intensity. The head amplifier consists of two discrete charge preamplifiers with junction field effect transistor (JFET) inputs, a sum and a difference stage, and two cable drivers. Special attention has been paid to the amplifier printed circuit board design to minimize the parasitic capacitances and inductances at the charge amplifier stages to meet the gain and noise requirements. The measurements carried out on the head amplifier showed a gain of 40.5 and 46.5 dB for the sum and difference outputs with a bandwidth from 200 Hz to 75 MHz and an input voltage noise density lower than 400 pV/v Hz. Twenty head amplifiers have been already installed in the ring and they have been used to detect the first beam signals during the first commissioning stage in November 2016.
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