| Records |
| Author |
Marco-Hernandez, R.; Bau, M.; Ferrari, M.; Ferrari, V.; Pedersen, F.; Soby, L. |
| Title |
A Low-Noise Charge Amplifier for the ELENA Trajectory, Orbit, and Intensity Measurement System |
Type |
Journal Article |
| Year |
2017 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
| Volume |
64 |
Issue |
9 |
Pages |
2465-2473 |
| Keywords |
Beam position monitor (BPM); charge sensitive amplifier; instrumentation for accelerators; low-noise amplifier; particle accelerators; printed circuits |
| Abstract |
A low-noise head amplifier has been developed for the extra low energy antiproton ring beam trajectory, orbit, and intensity measurement system at CERN. This system is based on 24 double-electrode electrostatic beam position monitors installed around the ring. A head amplifier is placed close to each beam position monitor to amplify the electrode signals and generate a difference and a sum signal. These signals are sent to the digital acquisition system, about 50 m away from the ring, where they are digitized and further processed. The beam position can be measured by dividing the difference signal by the sum signal while the sum signal gives information relative to the beam intensity. The head amplifier consists of two discrete charge preamplifiers with junction field effect transistor (JFET) inputs, a sum and a difference stage, and two cable drivers. Special attention has been paid to the amplifier printed circuit board design to minimize the parasitic capacitances and inductances at the charge amplifier stages to meet the gain and noise requirements. The measurements carried out on the head amplifier showed a gain of 40.5 and 46.5 dB for the sum and difference outputs with a bandwidth from 200 Hz to 75 MHz and an input voltage noise density lower than 400 pV/v Hz. Twenty head amplifiers have been already installed in the ring and they have been used to detect the first beam signals during the first commissioning stage in November 2016. |
| Address |
[Marco-Hernandez, Ricardo; Pedersen, Flemming; Soby, Lars] CERN, CH-1217 Meyrin, Switzerland, Email: rmarco@ific.uv.es |
| Corporate Author |
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Thesis |
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| Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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| Language |
English |
Summary Language |
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Series Title |
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Edition |
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| ISSN |
0018-9499 |
ISBN |
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Expedition |
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Conference |
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Notes  |
WOS:000411029500002 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
3298 |
| Permanent link to this record |
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| Author |
Aliaga, R.J. |
| Title |
Real-Time Estimation of Zero Crossings of Sampled Signals for Timing Using Cubic Spline Interpolation |
Type |
Journal Article |
| Year |
2017 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
| Volume |
64 |
Issue |
8 |
Pages |
2414-2422 |
| Keywords |
Digital arithmetic; digital circuits; digital timing; field-programmable gate array (FPGA); interpolation; signal processing algorithms; splines time estimation; time resolution |
| Abstract |
A scheme is proposed for hardware estimation of the location of zero crossings of sampled signals with subsample resolution for timing applications, which consists of interpolating the signal with a cubic spline near the zero crossing and then finding the root of the resulting polynomial. An iterative algorithm based on the bisection method is presented that obtains one bit of the result per step and admits an efficient digital implementation using fixed-point representation. In particular, the root estimation iteration involves only two additions, and the initial values can be obtained from finite impulse response (FIR) filters with certain symmetry properties. It is shown that this allows online real-time estimation of timestamps in free-running sampling detector systems with improved accuracy with respect to the more common linear interpolation. The method is evaluated with simulations using ideal and real timing signals, and estimates are given for the resource usage and speed of its implementation. |
| Address |
[Aliaga, Ramon J.] Inst Fis Corpuscular, Paterna 46980, Spain, Email: raalva@upvnet.upv.es |
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| Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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| Language |
English |
Summary Language |
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Edition |
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| ISSN |
0018-9499 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
WOS:000411027700008 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
no |
| Call Number |
IFIC @ pastor @ |
Serial |
3301 |
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| Author |
Barrientos, D.; Bellato, M.; Bazzacco, D.; Bortolato, D.; Cocconi, P.; Gadea, A.; Gonzalez, V.; Gulmini, M.; Isocrate, R.; Mengoni, D.; Pullia, A.; Recchia, F.; Rosso, D.; Sanchis, E.; Toniolo, N.; Ur, C.A.; Valiente-Dobon, J.J. |
| Title |
Performance of the Fully Digital FPGA-Based Front-End Electronics for the GALILEO Array |
Type |
Journal Article |
| Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
| Volume |
62 |
Issue |
6 |
Pages |
3134-3139 |
| Keywords |
FPGA; front-end electronics; gamma-ray spectroscopy; germanium detectors |
| Abstract |
In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. This work presents the first results of the digital FEE system coupled with a GALILEO germanium detector, which has demonstrated the capability to achieve an energy resolution of 1.53% at an energy of 1.33 MeV, similar to the one obtained with a conventional analog system. While keeping a good performance in terms of energy resolution, digital electronics will allow to instrument the full GALILEO array with a versatile system with high integration and low power consumption and costs. |
| Address |
[Barrientos, D.; Bortolato, D.; Cocconi, P.; Gulmini, M.; Rosso, D.; Toniolo, N.; Valiente-Dobon, J. J.] Ist Nazl Fis Nucl, Lab Nazl Legnaro, I-35020 Padua, Italy, Email: diego.barrientos@lnl.infn.it |
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Thesis |
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| Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
0018-9499 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
WOS:000372013500005 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
2612 |
| Permanent link to this record |
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| Author |
Egea Canet, F.J. et al; Gadea, A.; Huyuk, T. |
| Title |
Digital Front-End Electronics for the Neutron Detector NEDA |
Type |
Journal Article |
| Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
| Volume |
62 |
Issue |
3 |
Pages |
1063-1069 |
| Keywords |
Digital systems; front-end electronics; neutron detectors; neutron-gamma discrimination |
| Abstract |
This paper presents the design of the NEDA (Neutron Detector Array) electronics, a first attempt to involve the use of digital electronics in large neutron detector arrays. Starting from the front-end modules attached to the PMTs (PhotoMultiplier Tubes) and ending up with the data processing workstations, a comprehensive electronic system capable of dealing with the acquisition and pre-processing of the neutron array is detailed. Among the electronic modules required, we emphasize the front-end analog processing, the digitalization, digital pre-processing and communications firmware, as well as the integration of the GTS (Global Trigger and Synchronization) system, already used successfully in AGATA (Advanced Gamma Tracking Array). The NEDA array will be available for measurements in 2016. |
| Address |
[Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es |
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Thesis |
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| Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
0018-9499 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
WOS:000356458000029 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
2279 |
| Permanent link to this record |
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| Author |
Egea Canet, F.J. et al; Gadea, A.; Huyuk, T. |
| Title |
A New Front-End High-Resolution Sampling Board for the New-Generation Electronics of EXOGAM2 and NEDA Detectors |
Type |
Journal Article |
| Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
| Volume |
62 |
Issue |
3 |
Pages |
1056-1062 |
| Keywords |
Acquisition in HP-Ge detectors; high-speed ADCs; low-noise electronics design |
| Abstract |
This paper presents the final design and results of the FADC Mezzanine for the EXOGAM (EXOtic GAMma array spectrometer) and NEDA (Neutron Detector Array) detectors. The measurements performed include those of studying the effective number of bits, the energy resolution using HP-Ge detectors, as well as timing histograms and discrimination performance. Finally, the conclusion shows how a common digitizing device has been integrated in the experimental environment of two very different detectors which combine both low-noise acquisition and fast sampling rates. Not only the integration fulfilled the expected specifications on both systems, but it also showed how a study of synergy between detectors could lead to the reduction of resources and time by applying a common strategy. |
| Address |
[Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es |
| Corporate Author |
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Thesis |
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| Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
0018-9499 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
WOS:000356458000028 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
2278 |
| Permanent link to this record |
