| |
Records |
Links |
|
Author |
Esteve, R.; Toledo, J.F.; Herrero, V.; Simon, A.; Monrabal, F.; Alvarez, V.; Rodriguez, J.; Querol, M.; Ballester, F. |
|
| |
Title |
The Event Detection System in the NEXT-White Detector |
Type |
Journal Article |
| |
Year |
2021 |
Publication |
Sensors |
Abbreviated Journal |
Sensors |
|
| |
Volume |
21 |
Issue |
2 |
Pages |
673 - 18pp |
|
| |
Keywords |
xenon TPC; trigger concepts; data acquisition circuits; FPGA |
|
| |
Abstract |
This article describes the event detection system of the NEXT-White detector, a 5 kg high pressure xenon TPC with electroluminescent amplification, located in the Laboratorio Subterraneo de Canfranc (LSC), Spain. The detector is based on a plane of photomultipliers (PMTs) for energy measurements and a silicon photomultiplier (SiPM) tracking plane for offline topological event filtering. The event detection system, based on the SRS-ATCA data acquisition system developed in the framework of the CERN RD51 collaboration, has been designed to detect multiple events based on online PMT signal energy measurements and a coincidence-detection algorithm. Implemented on FPGA, the system has been successfully running and evolving during NEXT-White operation. The event detection system brings some relevant and new functionalities in the field. A distributed double event processor has been implemented to detect simultaneously two different types of events thus allowing simultaneous calibration and physics runs. This special feature provides constant monitoring of the detector conditions, being especially relevant to the lifetime and geometrical map computations which are needed to correct high-energy physics events. Other features, like primary scintillation event rejection, or a double buffer associated with the type of event being searched, help reduce the unnecessary data throughput thus minimizing dead time and improving trigger efficiency. |
|
| |
Address |
[Esteve Bosch, Raul; Toledo Alarcon, Jose F.; Herrero Bosch, Vicente; Alvarez Puerta, Vicente; Rodriguez Samaniego, Javier; Ballester Merelo, Francisco] Univ Politecn Valencia, CSIC, Inst Instrumentac Imagen Mol I3M, Ctr Mixto, Camino Vera S-N, Valencia 46022, Spain, Email: rauesbos@eln.upv.es; |
|
| |
Corporate Author |
|
Thesis |
|
|
| |
Publisher |
Mdpi |
Place of Publication |
|
Editor |
|
|
| |
Language |
English |
Summary Language |
|
Original Title |
|
|
| |
Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
|
| |
Series Volume |
|
Series Issue |
|
Edition |
|
|
| |
ISSN  |
|
ISBN |
|
Medium |
|
|
| |
Area |
|
Expedition |
|
Conference |
|
|
| |
Notes |
WOS:000611719600001 |
Approved |
no |
|
| |
Is ISI |
yes |
International Collaboration |
yes |
|
| |
Call Number |
IFIC @ pastor @ |
Serial |
4693 |
|
| Permanent link to this record |
| |
|
| |
|
Author |
KM3NeT Collaboration (Aiello, S. et al); Calvo, D.; Coleiro, A.; Colomer, M.; Gozzini, S.R.; Hernandez-Rey, J.J.; Illuminati, G.; Khan Chowdhury, N.R.; Manczak, J.; Pieterse, C.; Real, D.; Thakore, T.; Zornoza, J.D.; Zuñiga, J. |
|
| |
Title |
The Control Unit of the KM3NeT Data Acquisition System |
Type |
Journal Article |
| |
Year |
2020 |
Publication |
Computer Physics Communications |
Abbreviated Journal |
Comput. Phys. Commun. |
|
| |
Volume |
256 |
Issue |
|
Pages |
107433 - 16pp |
|
| |
Keywords |
KM3NeT; Data acquisition control; Neutrino detector; Astroparticle detector; 07.05.Hd; 29.85.Ca |
|
| |
Abstract |
The KM3NeT Collaboration runs a multi-site neutrino observatory in the Mediterranean Sea. Water Cherenkov particle detectors, deep in the sea and far off the coasts of France and Italy, are already taking data while incremental construction progresses. Data Acquisition Control software is operating off-shore detectors as well as testing and qualification stations for their components. The software, named Control Unit, is highly modular. It can undergo upgrades and reconfiguration with the acquisition running. Interplay with the central database of the Collaboration is obtained in a way that allows for data taking even if Internet links fail. In order to simplify the management of computing resources in the long term, and to cope with possible hardware failures of one or more computers, the KM3NeT Control Unit software features a custom dynamic resource provisioning and failover technology, which is especially important for ensuring continuity in case of rare transient events in multi-messenger astronomy. The software architecture relies on ubiquitous tools and broadly adopted technologies and has been successfully tested on several operating systems. |
|
| |
Address |
[Aiello, S.; Leonora, E.; Longhitano, F.; Randazzo, N.] Ist Nazl Fis Nucl, Sez Catania, Via Santa Sofia 64, I-95123 Catania, Italy, Email: cbozza@unisa.it; |
|
| |
Corporate Author |
|
Thesis |
|
|
| |
Publisher |
Elsevier |
Place of Publication |
|
Editor |
|
|
| |
Language |
English |
Summary Language |
|
Original Title |
|
|
| |
Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
|
| |
Series Volume |
|
Series Issue |
|
Edition |
|
|
| |
ISSN |
0010-4655 |
ISBN |
|
Medium |
|
|
| |
Area |
|
Expedition |
|
Conference |
|
|
| |
Notes |
WOS:000590251400011 |
Approved |
no |
|
| |
Is ISI |
yes |
International Collaboration |
yes |
|
| |
Call Number |
IFIC @ pastor @ |
Serial |
4616 |
|
| Permanent link to this record |
| |
|
| |
|
Author |
Carrio, F. |
|
| |
Title |
The Data Acquisition System for the ATLAS Tile Calorimeter Phase-II Upgrade Demonstrator |
Type |
Journal Article |
| |
Year |
2022 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
|
| |
Volume |
69 |
Issue |
4 |
Pages |
687-695 |
|
| |
Keywords |
Large Hadron Collider; Data acquisition; Field programmable gate arrays; Clocks; Detectors; Computer architecture; Microprocessors; ATLAS tile calorimeter (TileCal); data acquisition (DAQ) systems; field-programmable gate array (FPGA); high energy physics; high-speed electronics |
|
| |
Abstract |
The tile calorimeter (TileCal) is the central hadronic calorimeter of the ATLAS experiment at the large hadron collider (LHC). In 2025, the LHC will be upgraded leading to the high luminosity LHC (HL-LHC). The HL-LHC will deliver an instantaneous luminosity up to seven times larger than the LHC nominal luminosity. The ATLAS Phase-II upgrade (2025-2027) will accommodate the subdetectors to the HL-LHC requirements. As part of this upgrade, the majority of the TileCal on-detector and off-detector electronics will be replaced using a new readout strategy, where the on-detector electronics will digitize and transmit digitized detector data to the off-detector electronics at the bunch crossing frequency (40 MHz). In the counting rooms, the off-detector electronics will compute reconstructed trigger objects for the first-level trigger and will store the digitized samples in pipelined buffers until the reception of a trigger acceptance signal. The off-detector electronics will also distribute the LHC clock to the on-detector electronics embedded within the digital data stream. The TileCal Phase-II upgrade project has undertaken an extensive research and development program that includes the development of a Demonstrator module to evaluate the performance of the new clock and readout architecture envisaged for the HL-LHC. The Demonstrator module equipped with the latest version of the on-detector electronics was built and inserted into the ATLAS experiment. The Demonstrator module is operated and read out using a Tile PreProcessor (TilePPr) Demonstrator which enables backward compatibility with the present ATLAS Trigger and Data AcQuisition (TDAQ), and the timing, trigger, and command (TTC) systems. This article describes in detail the main hardware and firmware components of the clock distribution and data acquisition systems for the Demonstrator module, focusing on the TilePPr Demonstrator. |
|
| |
Address |
[Carrio, F.] Inst Fis Corpuscular CSIC UV, Paterna 46980, Spain, Email: fernando.carrio@cern.ch |
|
| |
Corporate Author |
|
Thesis |
|
|
| |
Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
|
Editor |
|
|
| |
Language |
English |
Summary Language |
|
Original Title |
|
|
| |
Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
|
| |
Series Volume |
|
Series Issue |
|
Edition |
|
|
| |
ISSN |
0018-9499 |
ISBN |
|
Medium |
|
|
| |
Area |
|
Expedition |
|
Conference |
|
|
| |
Notes |
WOS:000803113800016 |
Approved |
no |
|
| |
Is ISI |
yes |
International Collaboration |
no |
|
| |
Call Number |
IFIC @ pastor @ |
Serial |
5244 |
|
| Permanent link to this record |
| |
|
| |
|
Author |
Valero, A.; Castillo Gimenez, V.; Ferrer, A.; Gonzalez, V.; Hernandez Jimenez, Y.; Higon-Rodriguez, E.; Sanchis, E.; Solans, C.; Torres, J.; Valls Ferrer, J.A. |
|
| |
Title |
The ATLAS tile calorimeter ROD injector and multiplexer board |
Type |
Journal Article |
| |
Year |
2011 |
Publication |
Nuclear Instruments & Methods in Physics Research A |
Abbreviated Journal |
Nucl. Instrum. Methods Phys. Res. A |
|
| |
Volume |
629 |
Issue |
1 |
Pages |
74-79 |
|
| |
Keywords |
LHC; ATLAS; Calorimeter; Data acquisition; FPGA; Bit error rate |
|
| |
Abstract |
The ATLAS Tile Calorimeter is a sampling detector composed by cells made of iron-scintillator tiles. The calorimeter cell signals are digitized in the front-end electronics and transmitted to the Read-Out Drivers (RODs) at the first level trigger rate. The ROD receives triggered data from up to 9856 channels and provides the energy, phase and quality factor of the signals to the second level trigger. The back-end electronics is divided into four partitions containing eight RODs each. Therefore, a total of 32 RODs are used to process and transmit the data of the TileCal detector. In order to emulate the detector signals in the production and commissioning of ROD modules a board called ROD Injector and Multiplexer Board (RIMBO) was designed. In this paper, the RIMBO main functional blocks, PCB design and the different operation modes are described. It is described the crucial role of the board within the TileCal ROD test-bench in order to emulate the front-end electronics during the validation of ROD boards as well as during the evaluation of the ROD signal reconstruction algorithms. Finally, qualification and performance results for the injection operation mode obtained during the Tile Calorimeter ROD production tests are presented. |
|
| |
Address |
[Valero, A.; Castillo, V.; Ferrer, A.; Hernandez, Y.; Higon, E.; Solans, C.; Valls, J. A.] Univ Valencia, CSIC, Inst Fis Corpuscular, Valencia 46071, Spain, Email: alberto.valero@cern.ch |
|
| |
Corporate Author |
|
Thesis |
|
|
| |
Publisher |
Elsevier Science Bv |
Place of Publication |
|
Editor |
|
|
| |
Language |
English |
Summary Language |
|
Original Title |
|
|
| |
Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
|
| |
Series Volume |
|
Series Issue |
|
Edition |
|
|
| |
ISSN |
0168-9002 |
ISBN |
|
Medium |
|
|
| |
Area |
|
Expedition |
|
Conference |
|
|
| |
Notes |
ISI:000287556100012 |
Approved |
no |
|
| |
Is ISI |
yes |
International Collaboration |
no |
|
| |
Call Number |
IFIC @ pastor @ |
Serial |
555 |
|
| Permanent link to this record |
| |
|
| |
|
Author |
Aliaga, R.J.; Herrero-Bosch, V.; Capra, S.; Pullia, A.; Duenas, J.A.; Grassi, L.; Triossi, A.; Domingo-Pardo, C.; Gadea, R.; Gonzalez, V.; Huyuk, T.; Sanchis, E.; Gadea, A.; Mengoni, D. |
|
| |
Title |
Conceptual design of the TRACE detector readout using a compact, dead time-less analog memory ASIC |
Type |
Journal Article |
| |
Year |
2015 |
Publication |
Nuclear Instruments & Methods in Physics Research A |
Abbreviated Journal |
Nucl. Instrum. Methods Phys. Res. A |
|
| |
Volume |
800 |
Issue |
|
Pages |
34-39 |
|
| |
Keywords |
Analog memory; Dead time; Detector readout; Front-end electronics; Switched Capacitor Array (SCA); Triggerless data acquisition |
|
| |
Abstract |
The new TRacking Array for light Charged particle Ejectiles (TRACE) detector system requires monitorization and sampling of all pulses in a large number of channels with very strict space and power consumption restrictions for the front-end electronics and cabling, Its readout system is to be based on analog memory ASICs with 64 channels each that sample a 1 μs window of the waveform of any valid pulses at 200 MHz while discarding any other signals and are read out at 50 MHz with external ADC digitization. For this purpose, a new, compact analog memory architecture is described that allows pulse capture with zero dead time in any channel while vastly reducing the total number of storage cells, particularly for large amounts of input channels. This is accomplished by partitioning the typical Switched Capacitor Array structure into two pipelined, asymmetric stages and introducing FIFO queue-like control circuitry for captured data, achieving total independence between the capture and readout operations. |
|
| |
Address |
[Aliaga, R. J.; Domingo-Pardo, C.; Hueyuek, T.; Gadea, A.] Inst Fis Corpuscular, Paterna 46980, Spain, Email: raalva@ific.uv.es |
|
| |
Corporate Author |
|
Thesis |
|
|
| |
Publisher |
Elsevier Science Bv |
Place of Publication |
|
Editor |
|
|
| |
Language |
English |
Summary Language |
|
Original Title |
|
|
| |
Series Editor |
|
Series Title |
|
Abbreviated Series Title |
|
|
| |
Series Volume |
|
Series Issue |
|
Edition |
|
|
| |
ISSN |
0168-9002 |
ISBN |
|
Medium |
|
|
| |
Area |
|
Expedition |
|
Conference |
|
|
| |
Notes |
WOS:000361878200006 |
Approved |
no |
|
| |
Is ISI |
yes |
International Collaboration |
yes |
|
| |
Call Number |
IFIC @ pastor @ |
Serial |
2407 |
|
| Permanent link to this record |
