| Records |
| Author |
Carrio, F.; Kim, H.Y.; Moreno, P.; Reed, R.; Sandrock, C.; Schettino, V.; Shalyugin, A.; Solans, C.; Souza, J.; Usai, G.; Valero, A. |
| Title |
Design of an FPGA-based embedded system for the ATLAS Tile Calorimeter front-end electronics test-bench |
Type |
Journal Article |
| Year |
2014 |
Publication |
Journal of Instrumentation |
Abbreviated Journal |
J. Instrum. |
| Volume |
9 |
Issue |
|
Pages |
C03023 - 12pp |
| Keywords |
Detector control systems (detector and experiment monitoring and slow-control systems, architecture, hardware, algorithms; databases); Data acquisition concepts; Digital electronic circuits |
Abstract  |
The portable test-bench for the certification of the ATLAS tile hadronic calorimeter front-end electronics has been redesigned for the present Long Shutdown (LS1) of LHC, improving its portability and expanding its functionalities. This paper presents a new test-bench based on a Xilinx Virtex-5 FPGA that implements an embedded system using a PowerPC 440 microprocessor hard core and custom IP cores. A light Linux version runs on the PowerPC microprocessor and handles the IP cores which implement the different functionalities needed to perform the desired tests such as TTCvi emulation, G-Link decoding, ADC control and data reception. |
| Address |
[Carrio, F.; Valero, A.] Univ Valencia, CSIC, Inst Fis Corpuscular, E-46980 Paterna, Spain, Email: fernando.carrio@cern.ch |
| Corporate Author |
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Thesis |
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| Publisher |
Iop Publishing Ltd |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
1748-0221 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
|
| Notes |
WOS:000336123200023 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
1801 |
| Permanent link to this record |
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| Author |
Carrio, F. |
| Title |
The Data Acquisition System for the ATLAS Tile Calorimeter Phase-II Upgrade Demonstrator |
Type |
Journal Article |
| Year |
2022 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
| Volume |
69 |
Issue |
4 |
Pages |
687-695 |
| Keywords |
Large Hadron Collider; Data acquisition; Field programmable gate arrays; Clocks; Detectors; Computer architecture; Microprocessors; ATLAS tile calorimeter (TileCal); data acquisition (DAQ) systems; field-programmable gate array (FPGA); high energy physics; high-speed electronics |
| Abstract |
The tile calorimeter (TileCal) is the central hadronic calorimeter of the ATLAS experiment at the large hadron collider (LHC). In 2025, the LHC will be upgraded leading to the high luminosity LHC (HL-LHC). The HL-LHC will deliver an instantaneous luminosity up to seven times larger than the LHC nominal luminosity. The ATLAS Phase-II upgrade (2025-2027) will accommodate the subdetectors to the HL-LHC requirements. As part of this upgrade, the majority of the TileCal on-detector and off-detector electronics will be replaced using a new readout strategy, where the on-detector electronics will digitize and transmit digitized detector data to the off-detector electronics at the bunch crossing frequency (40 MHz). In the counting rooms, the off-detector electronics will compute reconstructed trigger objects for the first-level trigger and will store the digitized samples in pipelined buffers until the reception of a trigger acceptance signal. The off-detector electronics will also distribute the LHC clock to the on-detector electronics embedded within the digital data stream. The TileCal Phase-II upgrade project has undertaken an extensive research and development program that includes the development of a Demonstrator module to evaluate the performance of the new clock and readout architecture envisaged for the HL-LHC. The Demonstrator module equipped with the latest version of the on-detector electronics was built and inserted into the ATLAS experiment. The Demonstrator module is operated and read out using a Tile PreProcessor (TilePPr) Demonstrator which enables backward compatibility with the present ATLAS Trigger and Data AcQuisition (TDAQ), and the timing, trigger, and command (TTC) systems. This article describes in detail the main hardware and firmware components of the clock distribution and data acquisition systems for the Demonstrator module, focusing on the TilePPr Demonstrator. |
| Address |
[Carrio, F.] Inst Fis Corpuscular CSIC UV, Paterna 46980, Spain, Email: fernando.carrio@cern.ch |
| Corporate Author |
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Thesis |
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| Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
0018-9499 |
ISBN |
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Medium |
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| Area |
|
Expedition |
|
Conference |
|
| Notes |
WOS:000803113800016 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
no |
| Call Number |
IFIC @ pastor @ |
Serial |
5244 |
| Permanent link to this record |
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| Author |
Gololo, M.G.D.; Carrio Argos, F.; Mellado, B. |
| Title |
Tile Computer-on-Module for the ATLAS Tile Calorimeter Phase-II upgrades |
Type |
Journal Article |
| Year |
2022 |
Publication |
Journal of Instrumentation |
Abbreviated Journal |
J. Instrum. |
| Volume |
17 |
Issue |
6 |
Pages |
P06020 - 14pp |
| Keywords |
Control and monitor systems online; Detector control systems (detector and experiment monitoring and slow-control systems, architecture, hardware, algorithms, databases); Data acquisition circuits; Digital electronic circuits |
| Abstract |
The Tile PreProcessor (TilePPr) is the core element of the Tile Calorimeter (TileCal) off-detector electronics for High-luminosity Large Hadron Collider (HL-LHC). The TilePPr comprises FPGA-based boards to operate and read out the TileCal on-detector electronics. The Tile Computer on Module (TileCoM) mezzanine is embedded within TilePPr to carry out three main functionalities. These include remote configuration of on-detector electronics and TilePPr FPGAs, interface the TilePPr with the ATLAS Trigger and Data Acquisition (TDAQ) system, and interfacing the TilePPr with the ATLAS Detector Control System (DCS) by providing monitoring data. The TileCoM is a 10-layer board with a Zynq UltraScale+ ZU2CG for processing data, interface components to integrate with TilePPr and the power supply to be connected to the Advanced Telecommunication Computing Architecture carrier. A CentOS embedded Linux is deployed on the TileCoM to implement the required functionalities for the HL-LHC. In this paper we present the hardware and firmware developments of the TileCoM system in terms of remote programming, interface with ATLAS TDAQ system and DCS system. |
| Address |
[Gololo, M. G. D.; Argos, F. Carrio; Mellado, B.] Univ Witwatersrand, Inst Collider Particle Phys, 1 Jan Smuts Ave, ZA-2000 Johannesburg, South Africa, Email: mpho.gift.doctor.gololo@cern.ch |
| Corporate Author |
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Thesis |
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| Publisher |
IOP Publishing Ltd |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
1748-0221 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
|
| Notes |
WOS:000836448900004 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
5335 |
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| Author |
Esteve, R.; Toledo, J.F.; Herrero, V.; Simon, A.; Monrabal, F.; Alvarez, V.; Rodriguez, J.; Querol, M.; Ballester, F. |
| Title |
The Event Detection System in the NEXT-White Detector |
Type |
Journal Article |
| Year |
2021 |
Publication |
Sensors |
Abbreviated Journal |
Sensors |
| Volume |
21 |
Issue |
2 |
Pages |
673 - 18pp |
| Keywords |
xenon TPC; trigger concepts; data acquisition circuits; FPGA |
| Abstract |
This article describes the event detection system of the NEXT-White detector, a 5 kg high pressure xenon TPC with electroluminescent amplification, located in the Laboratorio Subterraneo de Canfranc (LSC), Spain. The detector is based on a plane of photomultipliers (PMTs) for energy measurements and a silicon photomultiplier (SiPM) tracking plane for offline topological event filtering. The event detection system, based on the SRS-ATCA data acquisition system developed in the framework of the CERN RD51 collaboration, has been designed to detect multiple events based on online PMT signal energy measurements and a coincidence-detection algorithm. Implemented on FPGA, the system has been successfully running and evolving during NEXT-White operation. The event detection system brings some relevant and new functionalities in the field. A distributed double event processor has been implemented to detect simultaneously two different types of events thus allowing simultaneous calibration and physics runs. This special feature provides constant monitoring of the detector conditions, being especially relevant to the lifetime and geometrical map computations which are needed to correct high-energy physics events. Other features, like primary scintillation event rejection, or a double buffer associated with the type of event being searched, help reduce the unnecessary data throughput thus minimizing dead time and improving trigger efficiency. |
| Address |
[Esteve Bosch, Raul; Toledo Alarcon, Jose F.; Herrero Bosch, Vicente; Alvarez Puerta, Vicente; Rodriguez Samaniego, Javier; Ballester Merelo, Francisco] Univ Politecn Valencia, CSIC, Inst Instrumentac Imagen Mol I3M, Ctr Mixto, Camino Vera S-N, Valencia 46022, Spain, Email: rauesbos@eln.upv.es; |
| Corporate Author |
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Thesis |
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| Publisher |
Mdpi |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
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ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
WOS:000611719600001 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
4693 |
| Permanent link to this record |
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| Author |
Marco-Hernandez, R.; Alves, D.; Angoletta, M.E.; Marqversen, O.; Molendijk, J.; Oponowicz, E.; Ruffieux, R.; Sanchez-Quesada, J.; Soby, L. |
| Title |
The AD and ELENA orbit, trajectory and intensity measurement systems |
Type |
Journal Article |
| Year |
2017 |
Publication |
Journal of Instrumentation |
Abbreviated Journal |
J. Instrum. |
| Volume |
12 |
Issue |
|
Pages |
P07024 - 24pp |
| Keywords |
Beam-line instrumentation (beam position and profile monitors; beam-intensity monitors; bunch length monitors); Data acquisition concepts; Digital electronic circuits; Digital signal processing (DSP) |
| Abstract |
This paper describes the new Antiproton Decelerator (AD) orbit measurement system and the Extra Low ENergy Antiproton ring (ELENA) orbit, trajectory and intensity measurement system. The AD machine at European Organization for Nuclear Research (CERN) is presently being used to decelerate antiprotons from 3.57 GeV/c to 100 MeV/c for matter vs anti-matter comparative studies. The ELENA machine, presently under commissioning, has been designed to provide an extra deceleration stage down to 13.7 MeV/c. The AD orbit system is based on 32 horizontal and 27 vertical electrostatic Beam Position Monitor (BPM) fitted with existing low noise front-end amplifiers while the ELENA system consists of 24 BPMs equipped with new low-noise head amplifiers. In both systems the front-end amplifiers generate a difference (delta) and a sum (sigma) signal which are sent to the digital acquisition system, placed tens of meters away from the AD or ELENA rings, where they are digitized and further processed. The beam position is calculated by dividing the difference signal by the sum signal either using directly the raw digitized data for measuring the turn-by-turn trajectory in the ELENA system or after down-mixing the signals to baseband for the orbit measurement in both machines. The digitized sigma signal will be used in the ELENA system to calculate the bunched beam intensity and the Schottky parameters with coasting beam after passing through different signal processing chain. The digital acquisition arrangement for both systems is based on the same hardware, also used in the ELENA Low Level Radio Frequency (LLRF) system, which follows the VME Switched Serial (VXS) enhancement of the Versa Module Eurocard 64x extension (VME64x) standard and includes VITA 57 standard Field Programmable Gate Array Mezzanine Card (FMC). The digital acquisition Field Programmable Gate Array (FPGA) andDigital Signal Processor (DSP) firmware sharesmany common functionalities with the LLRF system but has been tailored for this measurement application in particular. Specific control and acquisition software has been developed for these systems. Both systems are installed in AD and ELENA. The AD orbit system currently measures the orbit in AD while the ELENA system is being used in the commissioning of the ELENA ring. |
| Address |
[Marco-Hernandez, R.; Alves, D.; Angoletta, M. E.; Marqversen, O.; Molendijk, J.; Oponowicz, E.; Ruffieux, R.; Sanchez-Quesada, J.; Soby, L.] CERN, European Org Nucl Res, Beams Dept, 385 Route Meyrin, Meyrin, Switzerland, Email: Ricardo.Marco@ific.uv.es |
| Corporate Author |
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Thesis |
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| Publisher |
Iop Publishing Ltd |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
1748-0221 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
WOS:000406392600024 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ pastor @ |
Serial |
3233 |
| Permanent link to this record |
