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Affolder, A. A. et al, & Torres Reoyo, E. (2026). Impact of Cold Noise on the tracking performance of ATLAS ITk short strip barrel modules using a charged particle beam. Nucl. Instrum. Methods Phys. Res. A, 1092, 171800–11pp.
Abstract: The inner tracking system of the ATLAS experiment will be upgraded to a full silicon detector in 2030 for HL-LHC. The new tracking system is called ITk, the Inner Tracker. The ITk requirements include operational efficiency higher than 99% and noise hit occupancy smaller than 0.1%. During the pre-production phase of the ITk project, many short-strip modules were observed to exhibit so-called “Cold Noise (CN)”, wherein clusters of strips displayed very high noise when the modules were operated at temperatures below-35 degrees C. To investigate the CN impact and ensure the quality of module production, huge amount of effort have been put in by the collaboration. This paper focuses on the impact of CN on the tracking performance by examining two short strip modules that exhibit CN: one is non-irradiated, while the other one has been irradiated to the maximum expected end-of-lifetime fluence. For each module, the global and single strip tracking performance are evaluated. The global performance study shows that the non-irradiated module can be operated within specifications with a threshold around 1fC, but it is not possible to operate the irradiated module as required. In the single strip analysis, it was found that while CN does not affect the charge collection, it reduces the operating window and leaves less margin for detector operation. In the non-irradiated module, less than 3% of strips fail the detector requirements in the CN regions. For the irradiated module, about 20% of strips fail the requirements in the low CN region and around 52% fail in the high CN region. The fraction of strips that cannot operate due to CN throughout their lifetime can be predicted according to the measured noise at the required noise occupancy level and its expected median collected charge. In cases when the noise hit occupancy caused by CN is kept below 1% with a threshold smaller than 0.45 fC, at least 60% of strips could meet the operating requirements by the end of detector's lifetime. Thus, the module is likely to satisfy the operating requirements in terms of global efficiency and global noise occupancy.
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Benitez, V. et al, Bernabeu, J., Garcia, C., Lacasta, C., Marco, R., Rodriguez, D., et al. (2016). Sensors for the End-cap prototype of the Inner Tracker in the ATLAS Detector Upgrade. Nucl. Instrum. Methods Phys. Res. A, 833, 226–232.
Abstract: The new silicon microstrip sensors of the End-cap part of the HL-LHC ATLAS Inner Tracker (ITk) present a number of challenges due to their complex design features such as the multiple different sensor shapes, the varying strip pitch, or the built-In stereo angle. In order to investigate these specific problems, the “petalet” prototype was defined as a small End-cap prototype. The sensors for the petalet prototype include several new layout and technological solutions to investigate the issues, they have been tested in detail by the collaboration. The sensor description and detailed test results are presented in this paper. New software tools have been developed for the automatic layout generation of the complex designs. The sensors have been fabricated, characterized and delivered to the institutes in the collaboration for their assembly on petalet prototypes. This paper describes the lessons learnt from the design and tests of the new solutions implemented on these sensors, which are being used for the full petal sensor development. This has resulted in the ITIc strip, community acquiring the necessary expertise to develop the full End-cap structure, the petal.
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Cervello, A., Carrio, F., Garcia, R., Martos, J., Soret, J., Torres, J., et al. (2022). The TileCal PreProcessor interface with the ATLAS global data acquisition system at the HL-LHC. Nucl. Instrum. Methods Phys. Res. A, 1043, 167492–2pp.
Abstract: The Large Hadron Collider (LHC) has envisaged a series of upgrades towards a High Luminosity LHC (HL-LHC) delivering five times the LHC nominal instantaneous luminosity. It will take place throughout 2026-2028, corresponding to the Long Shutdown 3. During this upgrade, the ATLAS Tile Hadronic Calorimeter (TileCal) will replace completely on-and off-detector electronics adopting a new read-out architecture. Signals captured from TileCal are digitized by the on-detector electronics and transmitted to the TileCal PreProcessor (TilePPr) located off-detector, which provides the interface with the ATLAS trigger and data acquisition systems.TilePPr receives, process and transmits the data from the on-detector system and transmits it to the Front -End Link eXchange (FELIX) system. FELIX is the ATLAS common hardware in all the subdetectors designed to act as a data router, receiving and forwarding data to the SoftWare Read-Out Driver (SWROD) computers. FELIX also distributes the Timing, Trigger and Control (TTC) signals to the TilePPr to be propagated to the on-detector electronics. The SWROD is an ATLAS common software solution to perform detector specific data processing, including configuration, calibration, control and monitoring of the partitionIn this contribution we will introduce the new read-out elements for TileCal at the HL-LHC, the intercon-nection between the off-detector electronics and the FELIX system, the configuration and implementation for the test beam campaigns, as well as future developments of the preprocessing and monitoring status of the calorimeter modules through the SWROD infrastructure.
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Fernandez-Tejero, J. et al, & Soldevila, U. (2020). Humidity sensitivity of large area silicon sensors: Study and implications. Nucl. Instrum. Methods Phys. Res. A, 978, 164406–6pp.
Abstract: The production of large area sensors is one of the main challenges that the ATLAS collaboration faces for the new Inner-Tracker full-silicon detector. During the prototype fabrication phase for the High Luminosity Large Hadron Collider upgrade, several ATLAS institutes observed indications of humidity sensitivity of large area sensors, even at relative humidities well below the dew point. Specifically, prototype Barrel and End-Cap silicon strip sensors fabricated in 6-inch wafers manifest a prompt decrease of the breakdown voltage when operating under high relative humidity, adversely affecting the performance of the sensors. In addition to the investigation of these prototype sensors, a specific fabrication batch with special passivation is also studied, allowing for a deeper understanding of the responsible mechanisms. This work presents an extensive study of this behaviour on large area sensors. The locations of the hotspots at the breakdown voltage at high humidity are revealed using different infrared thermography techniques. Several palliative treatments are attempted, proving the influence of sensor cleaning methods, as well as baking, on the device performance, but no improvement on the humidity sensitivity was achieved. Furthermore, a study of the incidence of the sensitivity in different batches is also presented, introducing a hypothesis of the origins of the humidity sensitivity associated to the sensor edge design, together with passivation thickness and conformity. Several actions to be taken during sensor production and assembly are extracted from this study, in order to minimize the impact of humidity sensitivity on the performance of large area silicon sensors for High Energy Physics experiments.
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Hervas Alvarez, F., Valero, A., Fiorini, L., Gutierrez Arance, H., Carrio, F., Ahuja, S., et al. (2025). Versal Adaptive Compute Acceleration Platform Processing for ATLAS-TileCal Signal Reconstruction. Particles, 8(2), 49–9pp.
Abstract: Particle detectors at accelerators generate large amounts of data, requiring analysis to derive insights. Collisions lead to signal pile-up, where multiple particles produce signals in the same detector sensors, complicating individual signal identification. This contribution describes the implementation of a deep-learning algorithm on a Versal Adaptive Compute Acceleration Platform (ACAP) device for improved processing via parallelization and concurrency. Connected to a host computer via Peripheral Component Interconnect express (PCIe), this system aims for enhanced speed and energy efficiency over Central Processing Units (CPUs) and Graphics Processing Units (GPUs). In the contribution, we will describe in detail the data processing and the hardware, firmware and software components of the system. The contribution presents the implementation of the deep-learning algorithm on a Versal ACAP device, as well as the system for transferring data in an efficient way.
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