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Author Carrio, F.; Castillo Gimenez, V.; Ferrer, A.; Gonzalez, V.; Higon-Rodriguez, E.; Marin, C.; Moreno, P.; Sanchis, E.; Solans, C.; Valero, A.; Valls Ferrer, J.A. doi  openurl
  Title Optical Link Card Design for the Phase II Upgrade of TileCal Experiment Type Journal Article
  Year 2011 Publication IEEE Transactions on Nuclear Science Abbreviated Journal IEEE Trans. Nucl. Sci.  
  Volume 58 Issue 4 Pages 1657-1663  
  Keywords High energy physics instrumentation computing; optical-fiber communication high-speed electronics; programmable logic devices  
  Abstract This paper presents the design of an optical link card developed in the frame of the R&D activities for the phase 2 upgrade of the TileCal experiment. This board, that is part of the evaluation of different technologies for the final choice in the next years, is designed as a mezzanine that can work independently or be plugged in the optical multiplexer board of the TileCal backend electronics. It includes two SNAP 12 optical connectors able to transmit and receive up to 75 Gb/s and one SFP optical connector for lower speeds and compatibility with existing hardware as the read out driver. All processing is done in a Stratix II GX field-programmable gate array (FPGA). Details are given on the hardware design, including signal and power integrity analysis, needed when working with these high data rates and on firmware development to obtain the best performance of the FPGA signal transceivers and for the use of the GBT protocol.  
  Address [Carrio, F; Gonzalez, V; Marin, C; Sanchis, E] Univ Valencia, Dept Elect Engn, E-46100 Valencia, Spain, Email: vicente.gonzalez@uv.es  
  Corporate Author Thesis  
  Publisher Ieee-Inst Electrical Electronics Engineers Inc Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0018-9499 ISBN Medium  
  Area Expedition Conference  
  Notes WOS:000293975700037 Approved no  
  Is ISI yes International Collaboration no  
  Call Number IFIC @ elepoucu @ Serial 722  
Permanent link to this record
 

 
Author Belver, D.; Cabanelas, P.; Castro, E.; Garzon, J.A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M. doi  openurl
  Title Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall Type Journal Article
  Year 2010 Publication IEEE Transactions on Nuclear Science Abbreviated Journal IEEE Trans. Nucl. Sci.  
  Volume 57 Issue 5 Pages 2848-2856  
  Keywords Charge to width algorithm; fast amplifying and digitizing electronics; front-end electronics; HADES; time of flight; timing RPC  
  Abstract A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m(2) divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel Daughter BOard(DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade [1]. The commissioning of the whole RPC wall is finished and the 6 sectors are already mounted in their final position in the HADES spectrometer and ready to take data during the beam-times foreseen for 2010.  
  Address [Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.] Univ Santiago Compostela, LabCAF, Santiago De Compostela 15782, Spain, Email: daniel.belver@usc.es  
  Corporate Author Thesis  
  Publisher Ieee-Inst Electrical Electronics Engineers Inc Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0018-9499 ISBN Medium  
  Area Expedition Conference  
  Notes ISI:000283440400007 Approved no  
  Is ISI yes International Collaboration yes  
  Call Number IFIC @ elepoucu @ Serial 349  
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Author Esteve, R.; Toledo, J.; Monrabal, F.; Lorca, D.; Serra, L.; Mari, A.; Gomez-Cadenas, J.J.; Liubarsky, I.; Mora, F. doi  openurl
  Title The trigger system in the NEXT-DEMO detector Type Journal Article
  Year 2012 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.  
  Volume 7 Issue Pages C12001 - 9pp  
  Keywords Data acquisition circuits; Trigger algorithms; Trigger concepts and systems (hardware and software); Modular electronics  
  Abstract NEXT-DEMO is a prototype of NEXT (Neutrino Experiment with Xenon TPC), an experiment to search for neutrino-less double beta decay using a 100 kg radio-pure, 90 % enriched (136Xe isotope) high-pressure gaseous xenon TPC with electroluminescence readout. The detector is based on a PMT plane for energy measurements and a SiPM tracking plane for topological event filtering. The experiment will be located in the Canfranc Underground Laboratory in Spain. Front-end electronics, trigger and data-acquisition systems (DAQ) have been built. The DAQ is an implementation of the Scalable Readout System (RD51 collaboration) based on FPGA. Our approach for trigger is to have a distributed and reconfigurable system in the DAQ itself. Moreover, the trigger allows on-line triggering based on the detection of primary or secondary scintillation light, or a combination of both, that arrives to the PMT plane.  
  Address [Esteve, R.; Toledo, J.; Mari, A.; Mora, F.] Univ Politecn Valencia, Inst Instrumentac Imagen Mol I3M, Valencia 46022, Spain, Email: rauesbos@eln.upv.es  
  Corporate Author Thesis  
  Publisher Iop Publishing Ltd Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1748-0221 ISBN Medium  
  Area Expedition Conference  
  Notes WOS:000312962500001 Approved no  
  Is ISI yes International Collaboration no  
  Call Number IFIC @ pastor @ Serial 1288  
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Author Marco-Hernandez, R. doi  openurl
  Title Development of a beam test telescope based on the Alibava readout system Type Journal Article
  Year 2011 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.  
  Volume 6 Issue Pages C01002 - 7pp  
  Keywords Particle tracking detectors; Data acquisition circuits; Front-end electronics for detector readout; Digital electronic circuits  
  Abstract A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectronica (CNM) of Barcelona and Instituto de Fisica Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two Beetle ASICs for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two Beetle ASICs. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.  
  Address [Marco-Hernandez, R.; Alibava Collaboration] CSIC UV, Inst Fis Corpuscular, E-46980 Paterna, Valencia, Spain, Email: rmarco@ific.uv.es  
  Corporate Author Thesis  
  Publisher Iop Publishing Ltd Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1748-0221 ISBN Medium  
  Area Expedition Conference  
  Notes ISI:000291345600007 Approved no  
  Is ISI yes International Collaboration no  
  Call Number IFIC @ elepoucu @ Serial 644  
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Author Barrio, J.; Etxebeste, A.; Lacasta, C.; Muñoz, E.; Oliver, J.F.; Solaz, C.; Llosa, G. doi  openurl
  Title Performance of VATA64HDR16 ASIC for medical physics applications based on continuous crystals and SiPMs Type Journal Article
  Year 2015 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.  
  Volume 10 Issue Pages P12001 - 12pp  
  Keywords Solid state detectors; Photon detectors for UV, visible and IR photons (solid-state) (PIN diodes, APDs, Si-PMTs, G-APDs, CCDs, EBCCDs, EMCCDs etc); Front-end electronics for detector readout; Gamma detectors (scintillators, CZT, HPG, HgI etc)  
  Abstract Detectors based on Silicon Photomultipliers (SiPMs) coupled to continuous crystals are being tested in medical physics applications due to their potential high resolution and sensitivity. To cope with the high granularity required for a very good spatial resolution, SiPM matrices with a large amount of elements are needed. To be able to read the information coming from each individual channel, dedicated ASICs are employed. The VATA64HDR16 ASIC is a 64-channel, charge-sensitive amplifier that converts the collected charge into a proportional current or voltage signal. A complete assessment of the suitability of that ASIC for medical physics applications based on continuous crystals and SiPMs has been carried out. The input charge range is linear from 20 pC up to 55 pC. The energy resolution obtained at 511 keV is 10% FWHM with a LaBr3 crystal and 16% FWHM with a LYSO crystal. A coincidence timing resolution of 24 ns FWHM is obtained with two LYSO crystals.  
  Address [Barrio, J.; Etxebeste, A.; Lacasta, C.; Munoz, E.; Oliver, J. F.; Solaz, C.; Llosa, G.] Univ Valencia, CSIC, Inst Fis Corpuscular, Parque Cient,C Catedrat Jose Beltran 2, E-46980 Paterna, Spain, Email: John.Barrio@ific.uv.es  
  Corporate Author Thesis  
  Publisher Iop Publishing Ltd Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1748-0221 ISBN Medium  
  Area Expedition Conference  
  Notes WOS:000369998500034 Approved no  
  Is ISI yes International Collaboration no  
  Call Number IFIC @ pastor @ Serial 2548  
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