| Records |
| Author |
ANTARES Collaboration (Aguilar, J.A. et al); Bigongiari, C.; Dornic, D.; Emanuele, U.; Gomez-Gonzalez, J.P.; Hernandez-Rey, J.J.; Mangano, S.; Salesa, F.; Toscano, S.; Yepes, H.; Zornoza, J.D.; Zuñiga, J. |
| Title |
Performance of the front-end electronics of the ANTARES neutrino telescope |
Type |
Journal Article |
| Year |
2010 |
Publication |
Nuclear Instruments & Methods in Physics Research A |
Abbreviated Journal |
Nucl. Instrum. Methods Phys. Res. A |
| Volume |
622 |
Issue |
1 |
Pages |
59-73 |
| Keywords |
Neutrino telescope; Photomultiplier tube; Front-end electronics; ASIC |
| Abstract |
ANTARES is a high-energy neutrino telescope installed in the Mediterranean Sea at a depth of 2475 m. It consists of a three-dimensional array of optical modules, each containing a large photomultiplier tube. A total of 2700 front-end ASICs named analogue ring samplers (ARS) process the phototube signals, measure their arrival time, amplitude and shape as well as perform monitoring and calibration tasks. The ARS chip processes the analogue signals from the optical modules and converts information into digital data. All the information is transmitted to shore through further multiplexing electronics and an optical link. This paper describes the performance of the ARS chip: results from the functionality and characterization tests in the laboratory are summarized and the long-term performance in the apparatus is illustrated. |
| Address |
[Aguilar, J. A.; Bigongiari, C.; Dornic, D.; Emanuele, U.; Gomez-Gonzalez, J. P.; Hernandez-Rey, J. J.; Mangano, S.; Salesa, F.; Toscano, S.; Yepes, H.; Zornoza, J. D.; Zuniga, J.] Univ Valencia, IFIC, CSIC, Valencia 46071, Spain, Email: s.loucatos@cea.fr |
| Corporate Author |
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Thesis |
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| Publisher |
Elsevier Science Bv |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
|
Series Issue |
|
Edition |
|
| ISSN |
0168-9002 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
ISI:000282530300009 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ elepoucu @ |
Serial  |
363 |
| Permanent link to this record |
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| Author |
Belver, D.; Cabanelas, P.; Castro, E.; Garzon, J.A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M. |
| Title |
Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall |
Type |
Journal Article |
| Year |
2010 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
| Volume |
57 |
Issue |
5 |
Pages |
2848-2856 |
| Keywords |
Charge to width algorithm; fast amplifying and digitizing electronics; front-end electronics; HADES; time of flight; timing RPC |
| Abstract |
A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m(2) divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel Daughter BOard(DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade [1]. The commissioning of the whole RPC wall is finished and the 6 sectors are already mounted in their final position in the HADES spectrometer and ready to take data during the beam-times foreseen for 2010. |
| Address |
[Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.] Univ Santiago Compostela, LabCAF, Santiago De Compostela 15782, Spain, Email: daniel.belver@usc.es |
| Corporate Author |
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Thesis |
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| Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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Editor |
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| Language |
English |
Summary Language |
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Original Title |
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| Series Editor |
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Series Title |
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Abbreviated Series Title |
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| Series Volume |
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Series Issue |
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Edition |
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| ISSN |
0018-9499 |
ISBN |
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Medium |
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| Area |
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Expedition |
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Conference |
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| Notes |
ISI:000283440400007 |
Approved |
no |
| Is ISI |
yes |
International Collaboration |
yes |
| Call Number |
IFIC @ elepoucu @ |
Serial |
349 |
| Permanent link to this record |
