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Author n_TOF Collaboration (Zugec, P. et al); Domingo-Pardo, C.; Giubrone, G.; Tain, J.L. url  doi
openurl 
  Title GEANT4 simulation of the neutron background of the C6D6 set-up for capture studies at n_TOF Type Journal Article
  Year 2014 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A  
  Volume 760 Issue Pages 57-67  
  Keywords (down) GEANT4 simulations; Neutron time of flight; Neutron background; N_TOF; Neutron capture  
  Abstract The neutron sensitivity of the Cr6D6 detector setup used at nTOF facility for capture measurements has been studied by means of detailed GEANT4 simulations. A realistic software replica of the entire nTOF experimental hall, including the neutron beam line, sample, detector supports and the walls of the experimental area has been implemented in the simulations. The simulations have been analyzed in the same manner as experimental data, in particular by applying the Pulse Height Weighting Technique. The simulations have been validated against a measurement of the neutron background performed with a(nat)-C sample, showing an excellent agreement above 1 keV. At lower energies, an additional component in the measured C-nat yield has been discovered, which prevents the use of C-nat data for neutron background estimates at neutron energies below a few hundred eV. The origin and time structure of the neutron background have been derived from the simulations. Examples of the neutron background for two different samples are demonstrating the important role of accurate simulations of the neutron background in capture cross-section measurements.  
  Address [Zugec, P.; Bosnar, D.] Univ Zagreb, Fac Sci, Dept Phys, Zagreb 41000, Croatia, Email: pzugec@phy.hr  
  Corporate Author Thesis  
  Publisher Elsevier Science Bv Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0168-9002 ISBN Medium  
  Area Expedition Conference  
  Notes WOS:000338350500008 Approved no  
  Is ISI yes International Collaboration yes  
  Call Number IFIC @ pastor @ Serial 1828  
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Author Belver, D.; Cabanelas, P.; Castro, E.; Garzon, J.A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M. doi  openurl
  Title Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall Type Journal Article
  Year 2010 Publication IEEE Transactions on Nuclear Science Abbreviated Journal IEEE Trans. Nucl. Sci.  
  Volume 57 Issue 5 Pages 2848-2856  
  Keywords (down) Charge to width algorithm; fast amplifying and digitizing electronics; front-end electronics; HADES; time of flight; timing RPC  
  Abstract A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m(2) divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel Daughter BOard(DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade [1]. The commissioning of the whole RPC wall is finished and the 6 sectors are already mounted in their final position in the HADES spectrometer and ready to take data during the beam-times foreseen for 2010.  
  Address [Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.] Univ Santiago Compostela, LabCAF, Santiago De Compostela 15782, Spain, Email: daniel.belver@usc.es  
  Corporate Author Thesis  
  Publisher Ieee-Inst Electrical Electronics Engineers Inc Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0018-9499 ISBN Medium  
  Area Expedition Conference  
  Notes ISI:000283440400007 Approved no  
  Is ISI yes International Collaboration yes  
  Call Number IFIC @ elepoucu @ Serial 349  
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