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Author Valero, A.; Castillo Gimenez, V.; Ferrer, A.; Gonzalez, V.; Hernandez Jimenez, Y.; Higon-Rodriguez, E.; Sanchis, E.; Solans, C.; Torres, J.; Valls Ferrer, J.A. doi  openurl
  Title The ATLAS tile calorimeter ROD injector and multiplexer board Type Journal Article
  Year 2011 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A  
  Volume 629 Issue (down) 1 Pages 74-79  
  Keywords LHC; ATLAS; Calorimeter; Data acquisition; FPGA; Bit error rate  
  Abstract The ATLAS Tile Calorimeter is a sampling detector composed by cells made of iron-scintillator tiles. The calorimeter cell signals are digitized in the front-end electronics and transmitted to the Read-Out Drivers (RODs) at the first level trigger rate. The ROD receives triggered data from up to 9856 channels and provides the energy, phase and quality factor of the signals to the second level trigger. The back-end electronics is divided into four partitions containing eight RODs each. Therefore, a total of 32 RODs are used to process and transmit the data of the TileCal detector. In order to emulate the detector signals in the production and commissioning of ROD modules a board called ROD Injector and Multiplexer Board (RIMBO) was designed. In this paper, the RIMBO main functional blocks, PCB design and the different operation modes are described. It is described the crucial role of the board within the TileCal ROD test-bench in order to emulate the front-end electronics during the validation of ROD boards as well as during the evaluation of the ROD signal reconstruction algorithms. Finally, qualification and performance results for the injection operation mode obtained during the Tile Calorimeter ROD production tests are presented.  
  Address [Valero, A.; Castillo, V.; Ferrer, A.; Hernandez, Y.; Higon, E.; Solans, C.; Valls, J. A.] Univ Valencia, CSIC, Inst Fis Corpuscular, Valencia 46071, Spain, Email: alberto.valero@cern.ch  
  Corporate Author Thesis  
  Publisher Elsevier Science Bv Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 0168-9002 ISBN Medium  
  Area Expedition Conference  
  Notes ISI:000287556100012 Approved no  
  Is ISI yes International Collaboration no  
  Call Number IFIC @ pastor @ Serial 555  
Permanent link to this record
 

 
Author Ahlburg, P. et al; Marinas, C. url  doi
openurl 
  Title EUDAQ – a data acquisition software framework for common beam telescopes Type Journal Article
  Year 2020 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.  
  Volume 15 Issue (down) 1 Pages P01038 - 30pp  
  Keywords Data acquisition concepts; Detector control systems (detector and experiment monitoring and slow-control systems, architecture, hardware, algorithms, databases); Particle tracking detectors; Calorimeters  
  Abstract EUDAQ is a generic data acquisition software developed for use in conjunction with common beam telescopes at charged particle beam lines. Providing high-precision reference tracks for performance studies of new sensors, beam telescopes are essential for the research and development towards future detectors for high-energy physics. As beam time is a highly limited resource, EUDAQ has been designed with reliability and ease-of-use in mind. It enables flexible integration of different independent devices under test via their specific data acquisition systems into a top-level framework. EUDAQ controls all components globally, handles the data flow centrally and synchronises and records the data streams. Over the past decade, EUDAQ has been deployed as part of a wide range of successful test beam campaigns and detector development applications.  
  Address [Arling, J. -H.; Dreyling-Eschweiler, J.; Eichhorn, T.; Gregor, I. -M.; Irles, A.; Jansen, H.; Keller, J. S.; Kulis, S.; Lange, J.; Luetticke, F.; Perrey, H.; Peschke, R.; Pitzl, D.; Rossi, E.; Rubinsky, I.; Stanitzki, M.] Deutsch Elektronen Synchrotron DESY, Notkestr 85, D-22607 Hamburg, Germany, Email: jan.dreyling-eschweiler@desy.de  
  Corporate Author Thesis  
  Publisher Iop Publishing Ltd Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1748-0221 ISBN Medium  
  Area Expedition Conference  
  Notes WOS:000525449600038 Approved no  
  Is ISI yes International Collaboration yes  
  Call Number IFIC @ pastor @ Serial 4649  
Permanent link to this record
 

 
Author Marco-Hernandez, R. doi  openurl
  Title Development of a beam test telescope based on the Alibava readout system Type Journal Article
  Year 2011 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.  
  Volume 6 Issue (down) Pages C01002 - 7pp  
  Keywords Particle tracking detectors; Data acquisition circuits; Front-end electronics for detector readout; Digital electronic circuits  
  Abstract A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectronica (CNM) of Barcelona and Instituto de Fisica Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two Beetle ASICs for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two Beetle ASICs. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.  
  Address [Marco-Hernandez, R.; Alibava Collaboration] CSIC UV, Inst Fis Corpuscular, E-46980 Paterna, Valencia, Spain, Email: rmarco@ific.uv.es  
  Corporate Author Thesis  
  Publisher Iop Publishing Ltd Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1748-0221 ISBN Medium  
  Area Expedition Conference  
  Notes ISI:000291345600007 Approved no  
  Is ISI yes International Collaboration no  
  Call Number IFIC @ elepoucu @ Serial 644  
Permanent link to this record
 

 
Author Esteve, R.; Toledo, J.; Monrabal, F.; Lorca, D.; Serra, L.; Mari, A.; Gomez-Cadenas, J.J.; Liubarsky, I.; Mora, F. doi  openurl
  Title The trigger system in the NEXT-DEMO detector Type Journal Article
  Year 2012 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.  
  Volume 7 Issue (down) Pages C12001 - 9pp  
  Keywords Data acquisition circuits; Trigger algorithms; Trigger concepts and systems (hardware and software); Modular electronics  
  Abstract NEXT-DEMO is a prototype of NEXT (Neutrino Experiment with Xenon TPC), an experiment to search for neutrino-less double beta decay using a 100 kg radio-pure, 90 % enriched (136Xe isotope) high-pressure gaseous xenon TPC with electroluminescence readout. The detector is based on a PMT plane for energy measurements and a SiPM tracking plane for topological event filtering. The experiment will be located in the Canfranc Underground Laboratory in Spain. Front-end electronics, trigger and data-acquisition systems (DAQ) have been built. The DAQ is an implementation of the Scalable Readout System (RD51 collaboration) based on FPGA. Our approach for trigger is to have a distributed and reconfigurable system in the DAQ itself. Moreover, the trigger allows on-line triggering based on the detection of primary or secondary scintillation light, or a combination of both, that arrives to the PMT plane.  
  Address [Esteve, R.; Toledo, J.; Mari, A.; Mora, F.] Univ Politecn Valencia, Inst Instrumentac Imagen Mol I3M, Valencia 46022, Spain, Email: rauesbos@eln.upv.es  
  Corporate Author Thesis  
  Publisher Iop Publishing Ltd Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1748-0221 ISBN Medium  
  Area Expedition Conference  
  Notes WOS:000312962500001 Approved no  
  Is ISI yes International Collaboration no  
  Call Number IFIC @ pastor @ Serial 1288  
Permanent link to this record
 

 
Author Carrio, F.; Kim, H.Y.; Moreno, P.; Reed, R.; Sandrock, C.; Schettino, V.; Shalyugin, A.; Solans, C.; Souza, J.; Usai, G.; Valero, A. doi  openurl
  Title Design of an FPGA-based embedded system for the ATLAS Tile Calorimeter front-end electronics test-bench Type Journal Article
  Year 2014 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.  
  Volume 9 Issue (down) Pages C03023 - 12pp  
  Keywords Detector control systems (detector and experiment monitoring and slow-control systems, architecture, hardware, algorithms; databases); Data acquisition concepts; Digital electronic circuits  
  Abstract The portable test-bench for the certification of the ATLAS tile hadronic calorimeter front-end electronics has been redesigned for the present Long Shutdown (LS1) of LHC, improving its portability and expanding its functionalities. This paper presents a new test-bench based on a Xilinx Virtex-5 FPGA that implements an embedded system using a PowerPC 440 microprocessor hard core and custom IP cores. A light Linux version runs on the PowerPC microprocessor and handles the IP cores which implement the different functionalities needed to perform the desired tests such as TTCvi emulation, G-Link decoding, ADC control and data reception.  
  Address [Carrio, F.; Valero, A.] Univ Valencia, CSIC, Inst Fis Corpuscular, E-46980 Paterna, Spain, Email: fernando.carrio@cern.ch  
  Corporate Author Thesis  
  Publisher Iop Publishing Ltd Place of Publication Editor  
  Language English Summary Language Original Title  
  Series Editor Series Title Abbreviated Series Title  
  Series Volume Series Issue Edition  
  ISSN 1748-0221 ISBN Medium  
  Area Expedition Conference  
  Notes WOS:000336123200023 Approved no  
  Is ISI yes International Collaboration yes  
  Call Number IFIC @ pastor @ Serial 1801  
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