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Author Alvarez, V.; Herrero-Bosch, V.; Esteve, R.; Laing, A.; Rodriguez, J.; Querol, M.; Monrabal, F.; Toledo, J.F.; Gomez-Cadenas, J.J.
Title The electronics of the energy plane of the NEXT-White detector Type Journal Article
Year 2019 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A
Volume 917 Issue (up) Pages 68-76
Keywords Calorimetry; Front-end electronics; Digital baseline restoration
Abstract This paper describes the electronics of NEXT-White (NEW) detector PMT plane, a high pressure xenon TPC with electroluminescent amplification (HPXe-EL) currently operating at the Laboratorio Subterraneo de Canfranc (LSC) in Huesca, Spain. In NEXT-White the energy of the event is measured by a plane of photomultipliers (PMTs) located behind a transparent cathode. The PMTs are Hamamatsu R11410-10 chosen due to their low radioactivity. The electronics have been designed and implemented to fulfill strict requirements: an overall energy resolution below 1% and a radiopurity budget of 20 mBq unit(-1) in the chain of Bi-214. All the components and materials have been carefully screened to assure a low radioactivity level and at the same time meet the required front-end electronics specifications. In order to reduce low frequency noise effects and enhance detector safety a grounded cathode connection has been used for the PMTs. This implies an AC-coupled readout and baseline variations in the PMT signals. A detailed description of the electronics and a novel approach based on a digital baseline restoration to obtain a linear response and handle AC coupling effects is presented. The final PMT channel design has been characterized with linearity better than 0.4% and noise below 0.4 mV.
Address [Alvarez, V; Laing, A.; Rodriguez, J.; Querol, M.; Gomez-Cadenas, J. J.] CSIC, IFIC, Inst Fis Corpuscular, Calle Catedrat Jose Beltran 2, Valencia 46980, Spain, Email: vicente.alvarez@ific.uv.es
Corporate Author Thesis
Publisher Elsevier Science Bv Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 0168-9002 ISBN Medium
Area Expedition Conference
Notes WOS:000455016500010 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ pastor @ Serial 3868
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Author ANTARES Collaboration (Aguilar, J.A. et al); Bigongiari, C.; Dornic, D.; Emanuele, U.; Gomez-Gonzalez, J.P.; Hernandez-Rey, J.J.; Mangano, S.; Salesa, F.; Toscano, S.; Yepes, H.; Zornoza, J.D.; Zuñiga, J.
Title Performance of the front-end electronics of the ANTARES neutrino telescope Type Journal Article
Year 2010 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A
Volume 622 Issue (up) 1 Pages 59-73
Keywords Neutrino telescope; Photomultiplier tube; Front-end electronics; ASIC
Abstract ANTARES is a high-energy neutrino telescope installed in the Mediterranean Sea at a depth of 2475 m. It consists of a three-dimensional array of optical modules, each containing a large photomultiplier tube. A total of 2700 front-end ASICs named analogue ring samplers (ARS) process the phototube signals, measure their arrival time, amplitude and shape as well as perform monitoring and calibration tasks. The ARS chip processes the analogue signals from the optical modules and converts information into digital data. All the information is transmitted to shore through further multiplexing electronics and an optical link. This paper describes the performance of the ARS chip: results from the functionality and characterization tests in the laboratory are summarized and the long-term performance in the apparatus is illustrated.
Address [Aguilar, J. A.; Bigongiari, C.; Dornic, D.; Emanuele, U.; Gomez-Gonzalez, J. P.; Hernandez-Rey, J. J.; Mangano, S.; Salesa, F.; Toscano, S.; Yepes, H.; Zornoza, J. D.; Zuniga, J.] Univ Valencia, IFIC, CSIC, Valencia 46071, Spain, Email: s.loucatos@cea.fr
Corporate Author Thesis
Publisher Elsevier Science Bv Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 0168-9002 ISBN Medium
Area Expedition Conference
Notes ISI:000282530300009 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ elepoucu @ Serial 363
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Author Egea Canet, F.J. et al; Gadea, A.; Huyuk, T.
Title Digital Front-End Electronics for the Neutron Detector NEDA Type Journal Article
Year 2015 Publication IEEE Transactions on Nuclear Science Abbreviated Journal IEEE Trans. Nucl. Sci.
Volume 62 Issue (up) 3 Pages 1063-1069
Keywords Digital systems; front-end electronics; neutron detectors; neutron-gamma discrimination
Abstract This paper presents the design of the NEDA (Neutron Detector Array) electronics, a first attempt to involve the use of digital electronics in large neutron detector arrays. Starting from the front-end modules attached to the PMTs (PhotoMultiplier Tubes) and ending up with the data processing workstations, a comprehensive electronic system capable of dealing with the acquisition and pre-processing of the neutron array is detailed. Among the electronic modules required, we emphasize the front-end analog processing, the digitalization, digital pre-processing and communications firmware, as well as the integration of the GTS (Global Trigger and Synchronization) system, already used successfully in AGATA (Advanced Gamma Tracking Array). The NEDA array will be available for measurements in 2016.
Address [Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es
Corporate Author Thesis
Publisher Ieee-Inst Electrical Electronics Engineers Inc Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 0018-9499 ISBN Medium
Area Expedition Conference
Notes WOS:000356458000029 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ pastor @ Serial 2279
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Author KM3NeT Collaboration (Aiello, S. et al); Calvo, D.; Coleiro, A.; Colomer, M.; Gozzini, S.R.; Hernandez-Rey, J.J.; Illuminati, G.; Khan Chowdhury, N.R.; Manczak, J.; Pieterse, C.; Real, D.; Thakore, T.; Zornoza, J.D.; Zuñiga, J.
Title KM3NeT front-end and readout electronics system: hardware, firmware, and software Type Journal Article
Year 2019 Publication Journal of Astronomical Telescopes, Instruments and Systems Abbreviated Journal J. Astron. Telesc. Instrum. Syst.
Volume 5 Issue (up) 4 Pages 046001 - 15pp
Keywords front-end electronics; readout electronics; neutrino telescope; KM3NeT
Abstract The KM3NeT research infrastructure being built at the bottom of the Mediterranean Sea will host water-Cherenkov telescopes for the detection of cosmic neutrinos. The neutrino telescopes will consist of large volume three-dimensional grids of optical modules to detect the Cherenkov light from charged particles produced by neutrino-induced interactions. Each optical module houses 31 3-in. photomultiplier tubes, instrumentation for calibration of the photomultiplier signal and positioning of the optical module, and all associated electronics boards. By design, the total electrical power consumption of an optical module has been capped at seven Watts. We present an overview of the front-end and readout electronics system inside the optical module, which has been designed for a 1-ns synchronization between the clocks of all optical modules in the grid during a life time of at least 20 years. (C) 2019 Society of Photo-Optical Instrumentation Engineers (SPIE)
Address [Aiello, Sebastiano; Leonora, Emanuele; Longhitano, Fabio; Randazzo, Nunzio] INFN, Sez Catania, Catania, Italy, Email: v.van.beveren@nikhef.nl;
Corporate Author Thesis
Publisher Spie-Soc Photo-Optical Instrumentation Engineers Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 2329-4124 ISBN Medium
Area Expedition Conference
Notes WOS:000510649500024 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ pastor @ Serial 4282
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Author Belver, D.; Cabanelas, P.; Castro, E.; Garzon, J.A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.
Title Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall Type Journal Article
Year 2010 Publication IEEE Transactions on Nuclear Science Abbreviated Journal IEEE Trans. Nucl. Sci.
Volume 57 Issue (up) 5 Pages 2848-2856
Keywords Charge to width algorithm; fast amplifying and digitizing electronics; front-end electronics; HADES; time of flight; timing RPC
Abstract A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m(2) divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel Daughter BOard(DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade [1]. The commissioning of the whole RPC wall is finished and the 6 sectors are already mounted in their final position in the HADES spectrometer and ready to take data during the beam-times foreseen for 2010.
Address [Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.] Univ Santiago Compostela, LabCAF, Santiago De Compostela 15782, Spain, Email: daniel.belver@usc.es
Corporate Author Thesis
Publisher Ieee-Inst Electrical Electronics Engineers Inc Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN 0018-9499 ISBN Medium
Area Expedition Conference
Notes ISI:000283440400007 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ elepoucu @ Serial 349
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