Records |
Author |
Poley, L. et al; Bernabeu, J.; Civera, J.V.; Lacasta, C.; Leon, P.; Platero, A.; Platero, V; Solaz, C.; Soldevila, U.; Vidal, G. |
Title |
The ABC130 barrel module prototyping programme for the ATLAS strip tracker |
Type |
Journal Article |
Year |
2020 |
Publication |
Journal of Instrumentation |
Abbreviated Journal |
J. Instrum. |
Volume |
15 |
Issue |
9 |
Pages |
P09004 - 78pp |
Keywords |
Detector design and construction technologies and materials; Si microstrip and pad detectors; Radiation-hard detectors; Front-end electronics for detector readout |
Abstract |
For the Phase-II Upgrade of the ATLAS Detector [1], its Inner Detector, consisting of silicon pixel, silicon strip and transition radiation sub-detectors, will be replaced with an all new 100% silicon tracker, composed of a pixel tracker at inner radii and a strip tracker at outer radii. The future ATLAS strip tracker will include 11,000 silicon sensor modules in the central region (barrel) and 7,000 modules in the forward region (end-caps), which are foreseen to be constructed over a period of 3.5 years. The construction of each module consists of a series of assembly and quality control steps, which were engineered to be identical for all production sites. In order to develop the tooling and procedures for assembly and testing of these modules, two series of major prototyping programs were conducted: an early program using readout chips designed using a 250 nm fabrication process (ABCN-250) [2, 3] and a subsequent program using a follow-up chip set made using 130 nm processing (ABC130 and HCC130 chips). This second generation of readout chips was used for an extensive prototyping program that produced around 100 barrel-type modules and contributed significantly to the development of the final module layout. This paper gives an overview of the components used in ABC130 barrel modules, their assembly procedure and findings resulting from their tests. |
Address |
[Poley, L.; Anderssen, E.; Ciocio, A.; Cornell, E.; Haber, C.; Haugen, T. E.; Heim, T.; Johnson, T. A.; Krizka, K.; Labitan, C.; Li, B.; Li, C.; MacFadyen, R.; Mladina, E.; Ottino, G.; Sanethavong, P.; Santpur, S. Neha; Witharm, R.] Lawrence Berkeley Natl Lab, Cyclotron Rd, Berkeley, CA 94720 USA, Email: APoley@cern.ch |
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Thesis |
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Publisher |
Iop Publishing Ltd |
Place of Publication |
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Editor |
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Language |
English |
Summary Language |
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Original Title |
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Series Editor |
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Series Title |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
1748-0221 |
ISBN |
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Medium |
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Area |
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Expedition |
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Conference |
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Notes |
WOS:000577273400004 |
Approved |
no |
Is ISI |
yes |
International Collaboration |
yes |
Call Number |
IFIC @ pastor @ |
Serial |
4572 |
Permanent link to this record |
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Author |
Barrientos, D.; Bellato, M.; Bazzacco, D.; Bortolato, D.; Cocconi, P.; Gadea, A.; Gonzalez, V.; Gulmini, M.; Isocrate, R.; Mengoni, D.; Pullia, A.; Recchia, F.; Rosso, D.; Sanchis, E.; Toniolo, N.; Ur, C.A.; Valiente-Dobon, J.J. |
Title |
Performance of the Fully Digital FPGA-Based Front-End Electronics for the GALILEO Array |
Type |
Journal Article |
Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
Volume |
62 |
Issue |
6 |
Pages |
3134-3139 |
Keywords |
FPGA; front-end electronics; gamma-ray spectroscopy; germanium detectors |
Abstract |
In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. This work presents the first results of the digital FEE system coupled with a GALILEO germanium detector, which has demonstrated the capability to achieve an energy resolution of 1.53% at an energy of 1.33 MeV, similar to the one obtained with a conventional analog system. While keeping a good performance in terms of energy resolution, digital electronics will allow to instrument the full GALILEO array with a versatile system with high integration and low power consumption and costs. |
Address |
[Barrientos, D.; Bortolato, D.; Cocconi, P.; Gulmini, M.; Rosso, D.; Toniolo, N.; Valiente-Dobon, J. J.] Ist Nazl Fis Nucl, Lab Nazl Legnaro, I-35020 Padua, Italy, Email: diego.barrientos@lnl.infn.it |
Corporate Author |
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Thesis |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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Editor |
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Language |
English |
Summary Language |
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Original Title |
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Series Editor |
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Series Title |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0018-9499 |
ISBN |
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Medium |
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Area |
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Expedition |
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Conference |
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Notes |
WOS:000372013500005 |
Approved |
no |
Is ISI |
yes |
International Collaboration |
yes |
Call Number |
IFIC @ pastor @ |
Serial |
2612 |
Permanent link to this record |
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Author |
Belver, D.; Cabanelas, P.; Castro, E.; Garzon, J.A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M. |
Title |
Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall |
Type |
Journal Article |
Year |
2010 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
Volume |
57 |
Issue |
5 |
Pages |
2848-2856 |
Keywords |
Charge to width algorithm; fast amplifying and digitizing electronics; front-end electronics; HADES; time of flight; timing RPC |
Abstract |
A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m(2) divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel Daughter BOard(DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade [1]. The commissioning of the whole RPC wall is finished and the 6 sectors are already mounted in their final position in the HADES spectrometer and ready to take data during the beam-times foreseen for 2010. |
Address |
[Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.] Univ Santiago Compostela, LabCAF, Santiago De Compostela 15782, Spain, Email: daniel.belver@usc.es |
Corporate Author |
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Thesis |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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Editor |
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Language |
English |
Summary Language |
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Original Title |
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Series Editor |
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Series Title |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0018-9499 |
ISBN |
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Medium |
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Area |
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Expedition |
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Conference |
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Notes |
ISI:000283440400007 |
Approved |
no |
Is ISI |
yes |
International Collaboration |
yes |
Call Number |
IFIC @ elepoucu @ |
Serial |
349 |
Permanent link to this record |
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Author |
KM3NeT Collaboration (Aiello, S. et al); Calvo, D.; Coleiro, A.; Colomer, M.; Gozzini, S.R.; Hernandez-Rey, J.J.; Illuminati, G.; Khan Chowdhury, N.R.; Manczak, J.; Pieterse, C.; Real, D.; Thakore, T.; Zornoza, J.D.; Zuñiga, J. |
Title |
KM3NeT front-end and readout electronics system: hardware, firmware, and software |
Type |
Journal Article |
Year |
2019 |
Publication |
Journal of Astronomical Telescopes, Instruments and Systems |
Abbreviated Journal |
J. Astron. Telesc. Instrum. Syst. |
Volume |
5 |
Issue |
4 |
Pages |
046001 - 15pp |
Keywords |
front-end electronics; readout electronics; neutrino telescope; KM3NeT |
Abstract |
The KM3NeT research infrastructure being built at the bottom of the Mediterranean Sea will host water-Cherenkov telescopes for the detection of cosmic neutrinos. The neutrino telescopes will consist of large volume three-dimensional grids of optical modules to detect the Cherenkov light from charged particles produced by neutrino-induced interactions. Each optical module houses 31 3-in. photomultiplier tubes, instrumentation for calibration of the photomultiplier signal and positioning of the optical module, and all associated electronics boards. By design, the total electrical power consumption of an optical module has been capped at seven Watts. We present an overview of the front-end and readout electronics system inside the optical module, which has been designed for a 1-ns synchronization between the clocks of all optical modules in the grid during a life time of at least 20 years. (C) 2019 Society of Photo-Optical Instrumentation Engineers (SPIE) |
Address |
[Aiello, Sebastiano; Leonora, Emanuele; Longhitano, Fabio; Randazzo, Nunzio] INFN, Sez Catania, Catania, Italy, Email: v.van.beveren@nikhef.nl; |
Corporate Author |
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Thesis |
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Publisher |
Spie-Soc Photo-Optical Instrumentation Engineers |
Place of Publication |
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Editor |
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Language |
English |
Summary Language |
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Original Title |
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Series Editor |
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Series Title |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
2329-4124 |
ISBN |
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Medium |
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Area |
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Expedition |
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Conference |
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Notes |
WOS:000510649500024 |
Approved |
no |
Is ISI |
yes |
International Collaboration |
yes |
Call Number |
IFIC @ pastor @ |
Serial |
4282 |
Permanent link to this record |
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Author |
Egea Canet, F.J. et al; Gadea, A.; Huyuk, T. |
Title |
Digital Front-End Electronics for the Neutron Detector NEDA |
Type |
Journal Article |
Year |
2015 |
Publication |
IEEE Transactions on Nuclear Science |
Abbreviated Journal |
IEEE Trans. Nucl. Sci. |
Volume |
62 |
Issue |
3 |
Pages |
1063-1069 |
Keywords |
Digital systems; front-end electronics; neutron detectors; neutron-gamma discrimination |
Abstract |
This paper presents the design of the NEDA (Neutron Detector Array) electronics, a first attempt to involve the use of digital electronics in large neutron detector arrays. Starting from the front-end modules attached to the PMTs (PhotoMultiplier Tubes) and ending up with the data processing workstations, a comprehensive electronic system capable of dealing with the acquisition and pre-processing of the neutron array is detailed. Among the electronic modules required, we emphasize the front-end analog processing, the digitalization, digital pre-processing and communications firmware, as well as the integration of the GTS (Global Trigger and Synchronization) system, already used successfully in AGATA (Advanced Gamma Tracking Array). The NEDA array will be available for measurements in 2016. |
Address |
[Egea Canet, F. J.; Gonzalez, V.; Sanchis, E.] Univ Valencia, Dept Elect Engn, Escola Tecn Super Engn, Valencia, Spain, Email: jaegea@ific.uv.es |
Corporate Author |
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Thesis |
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Publisher |
Ieee-Inst Electrical Electronics Engineers Inc |
Place of Publication |
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Editor |
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Language |
English |
Summary Language |
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Original Title |
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Series Editor |
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Series Title |
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Abbreviated Series Title |
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Series Volume |
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Series Issue |
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Edition |
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ISSN |
0018-9499 |
ISBN |
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Medium |
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Area |
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Expedition |
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Conference |
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Notes |
WOS:000356458000029 |
Approved |
no |
Is ISI |
yes |
International Collaboration |
yes |
Call Number |
IFIC @ pastor @ |
Serial |
2279 |
Permanent link to this record |