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Author ATLAS Collaboration (Aad, G. et al); Aparisi Pozo, J.A.; Bailey, A.J.; Cabrera Urban, S.; Cardillo, F.; Castillo Gimenez, V.; Costa, M.J.; Escobar, C.; Estrada Pastor, O.; Ferrer, A.; Fiorini, L.; Fullana Torregrosa, E.; Fuster, J.; Garcia, C.; Garcia Navarro, J.E.; Gonzalez de la Hoz, S.; Gonzalvo Rodriguez, G.R.; Guerrero Rojas, J.G.R.; Higon-Rodriguez, E.; Lacasta, C.; Lozano Bahilo, J.J.; Mamuzic, J.; Marti-Garcia, S.; Martinez Agullo, P.; Mitsou, V.A.; Moreno Llacer, M.; Navarro-Gonzalez, J.; Poveda, J.; Prades Ibañez, A.; Ruiz-Martinez, A.; Sabatini, P.; Salt, J.; Sayago Galvan, I.; Soldevila, U.; Sanchez, J.; Torro Pastor, E.; Valero, A.; Valls Ferrer, J.A.; Villaplana Perez, M.; Vos, M.
Title The ATLAS Fast TracKer system Type Journal Article
Year 2021 Publication Journal of Instrumentation Abbreviated Journal J. Instrum.
Volume 16 Issue 7 Pages P07006 - 61pp
Keywords Modular electronics; Online farms and online filtering; Pattern recognition, cluster finding, calibration and fitting methods; Trigger concepts and systems (hardware and software)
Abstract The ATLAS Fast TracKer (FTK) was designed to provide full tracking for the ATLAS high-level trigger by using pattern recognition based on Associative Memory (AM) chips and fitting in high-speed field programmable gate arrays. The tracks found by the FTK are based on inputs from all modules of the pixel and silicon microstrip trackers. The as-built FTK system and components are described, as is the online software used to control them while running in the ATLAS data acquisition system. Also described is the simulation of the FTK hardware and the optimization of the AM pattern banks. An optimization for long-lived particles with large impact parameter values is included. A test of the FTK system with the data playback facility that allowed the FTK to be commissioned during the shutdown between Run 2 and Run 3 of the LHC is reported. The resulting tracks from part of the FTK system covering a limited eta-phi region of the detector are compared with the output from the FTK simulation. It is shown that FTK performance is in good agreement with the simulation.
Address [Duvnjak, D.; Jackson, P.; Kong, A. X. Y.; Oliver, J. L.; Ruggeri, T. A.; Sharma, A. S.; White, M. J.] Univ Adelaide, Dept Phys, Adelaide, SA, Australia
Corporate Author Thesis
Publisher IOP Publishing Ltd Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN (down) 1748-0221 ISBN Medium
Area Expedition Conference
Notes WOS:000791152800006 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ pastor @ Serial 5225
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Author ANTARES Collaboration (Aguilar, J.A. et al); Bigongiari, C.; Dornic, D.; Emanuele, U.; Gomez-Gonzalez, J.P.; Hernandez-Rey, J.J.; Mangano, S.; Salesa, F.; Toscano, S.; Yepes, H.; Zornoza, J.D.; Zuñiga, J.
Title Performance of the front-end electronics of the ANTARES neutrino telescope Type Journal Article
Year 2010 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A
Volume 622 Issue 1 Pages 59-73
Keywords Neutrino telescope; Photomultiplier tube; Front-end electronics; ASIC
Abstract ANTARES is a high-energy neutrino telescope installed in the Mediterranean Sea at a depth of 2475 m. It consists of a three-dimensional array of optical modules, each containing a large photomultiplier tube. A total of 2700 front-end ASICs named analogue ring samplers (ARS) process the phototube signals, measure their arrival time, amplitude and shape as well as perform monitoring and calibration tasks. The ARS chip processes the analogue signals from the optical modules and converts information into digital data. All the information is transmitted to shore through further multiplexing electronics and an optical link. This paper describes the performance of the ARS chip: results from the functionality and characterization tests in the laboratory are summarized and the long-term performance in the apparatus is illustrated.
Address [Aguilar, J. A.; Bigongiari, C.; Dornic, D.; Emanuele, U.; Gomez-Gonzalez, J. P.; Hernandez-Rey, J. J.; Mangano, S.; Salesa, F.; Toscano, S.; Yepes, H.; Zornoza, J. D.; Zuniga, J.] Univ Valencia, IFIC, CSIC, Valencia 46071, Spain, Email: s.loucatos@cea.fr
Corporate Author Thesis
Publisher Elsevier Science Bv Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN (down) 0168-9002 ISBN Medium
Area Expedition Conference
Notes ISI:000282530300009 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ elepoucu @ Serial 363
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Author Herrero, V.; Toledo, J.; Catala, J.M.; Esteve, R.; Gil, A.; Lorca, D.; Monzo, J.M.; Sanchis, F.; Verdugo, A.
Title Readout electronics for the SiPM tracking plane in the NEXT-1 prototype Type Journal Article
Year 2012 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A
Volume 695 Issue Pages 229-232
Keywords Neutrino less double beta decay; Xenon gas TPC; SiPM readout; Front-end electronics; Gated integrator
Abstract NEXT is a new experiment to search for neutrinoless double beta decay using a 100 kg radio-pure high-pressure gaseous xenon TPC with electroluminescence readout. A large-scale prototype with a SiPM tracking plane has been built. The primary electron paths can be reconstructed from time-resolved measurements of the light that arrives to the SiPM plane. Our approach is to measure how many photons have reached each SiPM sensor each microsecond with a gated integrator. We have designed and tested a 16-channel front-end board that includes the analog paths and a digital section. Each analog path consists of three different stages: a transimpedance amplifier, a gated integrator and an offset and gain control stage. Measurements show good linearity and the ability to detect single photoelectrons.
Address [Herrero, V.; Toledo, J.; Catala, J. M.; Esteve, R.; Monzo, J. M.; Sanchis, F.] Univ Politecn Valencia, CIEMAT, Ctr Mixto, I3M, Valencia 46022, Spain, Email: jtoledo@eln.upv.es
Corporate Author Thesis
Publisher Elsevier Science Bv Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN (down) 0168-9002 ISBN Medium
Area Expedition Conference
Notes WOS:000311469900049 Approved no
Is ISI yes International Collaboration no
Call Number IFIC @ pastor @ Serial 1237
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Author Gil, A.; Diaz, J.; Gomez-Cadenas, J.J.; Herrero, V.; Rodriguez, J.; Serra, L.; Toledo, J.; Esteve, R.; Monzo, J.M.; Monrabal, F.; Yahlali, N.
Title Front-end electronics for accurate energy measurement of double beta decays Type Journal Article
Year 2012 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A
Volume 695 Issue Pages 407-409
Keywords Front-end electronics; Xenon gas TPC; Energy measurement; Electroluminiscence; Double-beta decay
Abstract NEXT, a double beta decay experiment that will operate in Canfranc Underground Laboratory (Spain), aims at measuring the neutrinoless double-beta decay of the 136Xe isotope using a TPC filled with enriched Xenon gas at high pressure operated in electroluminescence mode. One technological challenge of the experiment is to achieve resolution better than 1% in the energy measurement using a plane of UV sensitive photomultipliers readout with appropriate custom-made front-end electronics. The front-end is designed to be sensitive to the single photo-electron to detect the weak primary scintillation light produced in the chamber, and also to be able to cope with the electroluminescence signal (several hundred times higher and with a duration of microseconds). For efficient primary scintillation detection and precise energy measurement of the electroluminescent signals the front-end electronics features low noise and adequate amplification. The signal shaping provided allows the digitization of the signals at a frequency as low as 40 MHz.
Address [Gil, A.; Diaz, J.; Gomez-Cadenas, J. J.; Rodriguez, J.; Serra, L.; Monrabal, F.; Yahlali, N.] Inst Fis Corpuscular CSIC UV, Valencia 46071, Spain, Email: alejandro.gil@ific.uv.es
Corporate Author Thesis
Publisher Elsevier Science Bv Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN (down) 0168-9002 ISBN Medium
Area Expedition Conference
Notes WOS:000311469900092 Approved no
Is ISI yes International Collaboration no
Call Number IFIC @ pastor @ Serial 1238
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Author Aliaga, R.J.; Herrero-Bosch, V.; Capra, S.; Pullia, A.; Duenas, J.A.; Grassi, L.; Triossi, A.; Domingo-Pardo, C.; Gadea, R.; Gonzalez, V.; Huyuk, T.; Sanchis, E.; Gadea, A.; Mengoni, D.
Title Conceptual design of the TRACE detector readout using a compact, dead time-less analog memory ASIC Type Journal Article
Year 2015 Publication Nuclear Instruments & Methods in Physics Research A Abbreviated Journal Nucl. Instrum. Methods Phys. Res. A
Volume 800 Issue Pages 34-39
Keywords Analog memory; Dead time; Detector readout; Front-end electronics; Switched Capacitor Array (SCA); Triggerless data acquisition
Abstract The new TRacking Array for light Charged particle Ejectiles (TRACE) detector system requires monitorization and sampling of all pulses in a large number of channels with very strict space and power consumption restrictions for the front-end electronics and cabling, Its readout system is to be based on analog memory ASICs with 64 channels each that sample a 1 μs window of the waveform of any valid pulses at 200 MHz while discarding any other signals and are read out at 50 MHz with external ADC digitization. For this purpose, a new, compact analog memory architecture is described that allows pulse capture with zero dead time in any channel while vastly reducing the total number of storage cells, particularly for large amounts of input channels. This is accomplished by partitioning the typical Switched Capacitor Array structure into two pipelined, asymmetric stages and introducing FIFO queue-like control circuitry for captured data, achieving total independence between the capture and readout operations.
Address [Aliaga, R. J.; Domingo-Pardo, C.; Hueyuek, T.; Gadea, A.] Inst Fis Corpuscular, Paterna 46980, Spain, Email: raalva@ific.uv.es
Corporate Author Thesis
Publisher Elsevier Science Bv Place of Publication Editor
Language English Summary Language Original Title
Series Editor Series Title Abbreviated Series Title
Series Volume Series Issue Edition
ISSN (down) 0168-9002 ISBN Medium
Area Expedition Conference
Notes WOS:000361878200006 Approved no
Is ISI yes International Collaboration yes
Call Number IFIC @ pastor @ Serial 2407
Permanent link to this record