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Aliaga, R. J., Herrero-Bosch, V., Capra, S., Pullia, A., Duenas, J. A., Grassi, L., et al. (2015). Conceptual design of the TRACE detector readout using a compact, dead time-less analog memory ASIC. Nucl. Instrum. Methods Phys. Res. A, 800, 34–39.
Abstract: The new TRacking Array for light Charged particle Ejectiles (TRACE) detector system requires monitorization and sampling of all pulses in a large number of channels with very strict space and power consumption restrictions for the front-end electronics and cabling, Its readout system is to be based on analog memory ASICs with 64 channels each that sample a 1 μs window of the waveform of any valid pulses at 200 MHz while discarding any other signals and are read out at 50 MHz with external ADC digitization. For this purpose, a new, compact analog memory architecture is described that allows pulse capture with zero dead time in any channel while vastly reducing the total number of storage cells, particularly for large amounts of input channels. This is accomplished by partitioning the typical Switched Capacitor Array structure into two pipelined, asymmetric stages and introducing FIFO queue-like control circuitry for captured data, achieving total independence between the capture and readout operations.
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ANTARES Collaboration(Aguilar, J. A. et al), Bigongiari, C., Dornic, D., Emanuele, U., Gomez-Gonzalez, J. P., Hernandez-Rey, J. J., et al. (2010). Performance of the front-end electronics of the ANTARES neutrino telescope. Nucl. Instrum. Methods Phys. Res. A, 622(1), 59–73.
Abstract: ANTARES is a high-energy neutrino telescope installed in the Mediterranean Sea at a depth of 2475 m. It consists of a three-dimensional array of optical modules, each containing a large photomultiplier tube. A total of 2700 front-end ASICs named analogue ring samplers (ARS) process the phototube signals, measure their arrival time, amplitude and shape as well as perform monitoring and calibration tasks. The ARS chip processes the analogue signals from the optical modules and converts information into digital data. All the information is transmitted to shore through further multiplexing electronics and an optical link. This paper describes the performance of the ARS chip: results from the functionality and characterization tests in the laboratory are summarized and the long-term performance in the apparatus is illustrated.
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Alvarez, V., Herrero-Bosch, V., Esteve, R., Laing, A., Rodriguez, J., Querol, M., et al. (2019). The electronics of the energy plane of the NEXT-White detector. Nucl. Instrum. Methods Phys. Res. A, 917, 68–76.
Abstract: This paper describes the electronics of NEXT-White (NEW) detector PMT plane, a high pressure xenon TPC with electroluminescent amplification (HPXe-EL) currently operating at the Laboratorio Subterraneo de Canfranc (LSC) in Huesca, Spain. In NEXT-White the energy of the event is measured by a plane of photomultipliers (PMTs) located behind a transparent cathode. The PMTs are Hamamatsu R11410-10 chosen due to their low radioactivity. The electronics have been designed and implemented to fulfill strict requirements: an overall energy resolution below 1% and a radiopurity budget of 20 mBq unit(-1) in the chain of Bi-214. All the components and materials have been carefully screened to assure a low radioactivity level and at the same time meet the required front-end electronics specifications. In order to reduce low frequency noise effects and enhance detector safety a grounded cathode connection has been used for the PMTs. This implies an AC-coupled readout and baseline variations in the PMT signals. A detailed description of the electronics and a novel approach based on a digital baseline restoration to obtain a linear response and handle AC coupling effects is presented. The final PMT channel design has been characterized with linearity better than 0.4% and noise below 0.4 mV.
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Herrero, V., Toledo, J., Catala, J. M., Esteve, R., Gil, A., Lorca, D., et al. (2012). Readout electronics for the SiPM tracking plane in the NEXT-1 prototype. Nucl. Instrum. Methods Phys. Res. A, 695, 229–232.
Abstract: NEXT is a new experiment to search for neutrinoless double beta decay using a 100 kg radio-pure high-pressure gaseous xenon TPC with electroluminescence readout. A large-scale prototype with a SiPM tracking plane has been built. The primary electron paths can be reconstructed from time-resolved measurements of the light that arrives to the SiPM plane. Our approach is to measure how many photons have reached each SiPM sensor each microsecond with a gated integrator. We have designed and tested a 16-channel front-end board that includes the analog paths and a digital section. Each analog path consists of three different stages: a transimpedance amplifier, a gated integrator and an offset and gain control stage. Measurements show good linearity and the ability to detect single photoelectrons.
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Gil, A., Diaz, J., Gomez-Cadenas, J. J., Herrero, V., Rodriguez, J., Serra, L., et al. (2012). Front-end electronics for accurate energy measurement of double beta decays. Nucl. Instrum. Methods Phys. Res. A, 695, 407–409.
Abstract: NEXT, a double beta decay experiment that will operate in Canfranc Underground Laboratory (Spain), aims at measuring the neutrinoless double-beta decay of the 136Xe isotope using a TPC filled with enriched Xenon gas at high pressure operated in electroluminescence mode. One technological challenge of the experiment is to achieve resolution better than 1% in the energy measurement using a plane of UV sensitive photomultipliers readout with appropriate custom-made front-end electronics. The front-end is designed to be sensitive to the single photo-electron to detect the weak primary scintillation light produced in the chamber, and also to be able to cope with the electroluminescence signal (several hundred times higher and with a duration of microseconds). For efficient primary scintillation detection and precise energy measurement of the electroluminescent signals the front-end electronics features low noise and adequate amplification. The signal shaping provided allows the digitization of the signals at a frequency as low as 40 MHz.
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Marco-Hernandez, R. (2011). Development of a beam test telescope based on the Alibava readout system. J. Instrum., 6, C01002–7pp.
Abstract: A telescope for a beam test have been developed as a result of a collaboration among the University of Liverpool, Centro Nacional de Microelectronica (CNM) of Barcelona and Instituto de Fisica Corpuscular (IFIC) of Valencia. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test (DUT board). The DUT board uses two Beetle ASICs for the readout of chilled silicon detectors. The board could operate in a self-triggering mode. The board features a temperature sensor and it can be mounted on a rotary stage. A peltier element is used for cooling the DUT. Each XYT board measures the track space points using two silicon strip detectors connected to two Beetle ASICs. It can also trigger on the particle tracks in the beam test. The board includes a CPLD which allows for the synchronization of the trigger signal to a common clock frequency, delaying and implementing coincidence with other XYT boards. An Alibava mother board is used to read out and to control each XYT/DUT board from a common trigger signal and a common clock signal. The Alibava board has a TDC on board to have a time stamp of each trigger. The data collected by each Alibava board is sent to a master card by means of a local data/address bus following a custom digital protocol. The master board distributes the trigger, clock and reset signals. It also merges the data streams from up to sixteen Alibava boards. The board has also a test channel for testing in a standard mode a XYT or DUT board. This board is implemented with a Xilinx development board and a custom patch board. The master board is connected with the DAQ software via 100M Ethernet. Track based alignment software has also been developed for the data obtained with the DAQ software.
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Egea Canet, F. J. et al, Gadea, A., & Huyuk, T. (2015). Digital Front-End Electronics for the Neutron Detector NEDA. IEEE Trans. Nucl. Sci., 62(3), 1063–1069.
Abstract: This paper presents the design of the NEDA (Neutron Detector Array) electronics, a first attempt to involve the use of digital electronics in large neutron detector arrays. Starting from the front-end modules attached to the PMTs (PhotoMultiplier Tubes) and ending up with the data processing workstations, a comprehensive electronic system capable of dealing with the acquisition and pre-processing of the neutron array is detailed. Among the electronic modules required, we emphasize the front-end analog processing, the digitalization, digital pre-processing and communications firmware, as well as the integration of the GTS (Global Trigger and Synchronization) system, already used successfully in AGATA (Advanced Gamma Tracking Array). The NEDA array will be available for measurements in 2016.
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Belver, D., Cabanelas, P., Castro, E., Garzon, J. A., Gil, A., Gonzalez-Diaz, D., et al. (2010). Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall. IEEE Trans. Nucl. Sci., 57(5), 2848–2856.
Abstract: A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m(2) divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel Daughter BOard(DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade [1]. The commissioning of the whole RPC wall is finished and the 6 sectors are already mounted in their final position in the HADES spectrometer and ready to take data during the beam-times foreseen for 2010.
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Barrientos, D., Bellato, M., Bazzacco, D., Bortolato, D., Cocconi, P., Gadea, A., et al. (2015). Performance of the Fully Digital FPGA-Based Front-End Electronics for the GALILEO Array. IEEE Trans. Nucl. Sci., 62(6), 3134–3139.
Abstract: In this work we present the architecture and results of a fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The FEE system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. This work presents the first results of the digital FEE system coupled with a GALILEO germanium detector, which has demonstrated the capability to achieve an energy resolution of 1.53% at an energy of 1.33 MeV, similar to the one obtained with a conventional analog system. While keeping a good performance in terms of energy resolution, digital electronics will allow to instrument the full GALILEO array with a versatile system with high integration and low power consumption and costs.
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Poley, L. et al, Bernabeu, J., Civera, J. V., Lacasta, C., Leon, P., Platero, A., et al. (2020). The ABC130 barrel module prototyping programme for the ATLAS strip tracker. J. Instrum., 15(9), P09004–78pp.
Abstract: For the Phase-II Upgrade of the ATLAS Detector [1], its Inner Detector, consisting of silicon pixel, silicon strip and transition radiation sub-detectors, will be replaced with an all new 100% silicon tracker, composed of a pixel tracker at inner radii and a strip tracker at outer radii. The future ATLAS strip tracker will include 11,000 silicon sensor modules in the central region (barrel) and 7,000 modules in the forward region (end-caps), which are foreseen to be constructed over a period of 3.5 years. The construction of each module consists of a series of assembly and quality control steps, which were engineered to be identical for all production sites. In order to develop the tooling and procedures for assembly and testing of these modules, two series of major prototyping programs were conducted: an early program using readout chips designed using a 250 nm fabrication process (ABCN-250) [2, 3] and a subsequent program using a follow-up chip set made using 130 nm processing (ABC130 and HCC130 chips). This second generation of readout chips was used for an extensive prototyping program that produced around 100 barrel-type modules and contributed significantly to the development of the final module layout. This paper gives an overview of the components used in ABC130 barrel modules, their assembly procedure and findings resulting from their tests.
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