ATLAS Collaboration(Aad, G. et al), Akiot, A., Amos, K. R., Aparisi Pozo, J. A., Bailey, A. J., Bouchhar, N., et al. (2023). Fast b-tagging at the high-level trigger of the ATLAS experiment in LHC Run 3. J. Instrum., 18(11), P11006–38pp.
Abstract: The ATLAS experiment relies on real-time hadronic jet reconstruction and b-tagging to record fully hadronic events containing b-jets. These algorithms require track reconstruction, which is computationally expensive and could overwhelm the high-level-trigger farm, even at the reduced event rate that passes the ATLAS first stage hardware-based trigger. In LHC Run 3, ATLAS has mitigated these computational demands by introducing a fast neural-network-based b-tagger, which acts as a low-precision filter using input from hadronic jets and tracks. It runs after a hardware trigger and before the remaining high-level-trigger reconstruction. This design relies on the negligible cost of neural-network inference as compared to track reconstruction, and the cost reduction from limiting tracking to specific regions of the detector. In the case of Standard Model HH -> b (b) over barb (b) over bar, a key signature relying on b-jet triggers, the filter lowers the input rate to the remaining high-level trigger by a factor of five at the small cost of reducing the overall signal efficiency by roughly 2%.
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Aliaga, R. J., Herrero-Bosch, V., Capra, S., Pullia, A., Duenas, J. A., Grassi, L., et al. (2015). Conceptual design of the TRACE detector readout using a compact, dead time-less analog memory ASIC. Nucl. Instrum. Methods Phys. Res. A, 800, 34–39.
Abstract: The new TRacking Array for light Charged particle Ejectiles (TRACE) detector system requires monitorization and sampling of all pulses in a large number of channels with very strict space and power consumption restrictions for the front-end electronics and cabling, Its readout system is to be based on analog memory ASICs with 64 channels each that sample a 1 μs window of the waveform of any valid pulses at 200 MHz while discarding any other signals and are read out at 50 MHz with external ADC digitization. For this purpose, a new, compact analog memory architecture is described that allows pulse capture with zero dead time in any channel while vastly reducing the total number of storage cells, particularly for large amounts of input channels. This is accomplished by partitioning the typical Switched Capacitor Array structure into two pipelined, asymmetric stages and introducing FIFO queue-like control circuitry for captured data, achieving total independence between the capture and readout operations.
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Agramunt, J. et al, Tain, J. L., Albiol, F., Algora, A., Domingo-Pardo, C., Jordan, M. D., et al. (2016). Characterization of a neutron-beta counting system with beta-delayed neutron emitters. Nucl. Instrum. Methods Phys. Res. A, 807, 69–78.
Abstract: A new detection system for the measurement of beta-delayed neutron emission probabilities has been characterized using fission products with well known beta-delayed neutron emission properties. The setup consists of BELEN-20, a 4 pi-neutron counter with twenty He-3 proportional tubes arranged inside a large polyethylene neutron moderator, a thin Si detector for beta counting and a self-triggering digital data acquisition system. The use of delayed-neutron precursors with different neutron emission windows allowed the study of the effect of energy dependency on neutron, beta and beta-neutron rates. The observed effect is well reproduced by Monte Carlo simulations. The impact of this dependency on the accuracy of neutron emission probabilities is discussed. A new accurate value of the neutron emission probability for the important delayed-neutron precursor I-137 was obtained, P-n = 7.76(14)%.
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