%0 Journal Article
%T CMOS MAPS upgrade for the Belle II Vertex Detector
%A Babeluk, M. et al
%A Marinas, C.
%J Nuclear Instruments & Methods in Physics Research A
%D 2023
%V 1048
%I Elsevier
%@ 0168-9002
%G English
%F Babeluk+Marinas2023
%O WOS:000990246200001
%O exported from refbase (https://references.ific.uv.es/refbase/show.php?record=5538), last updated on Sun, 11 Jun 2023 17:45:39 +0000
%X The success of the Belle II experiment in Japan relies on the very high instantaneous luminosity, close to 6x1035 cm-2 s-1, expected from the SuperKEKB collider. The corresponding beam conditions at such luminosity levels generate large rates of background particles and creates stringent constraints on the vertex detector, adding to the physics requirements. Current prospects for the occupancy rates in the present vertex detector (VXD) at full luminosity fall close to the acceptable limits and bear large uncertainties. In this context, the Belle II collaboration is considering the possibility to install an upgraded VXD system around 2027 to provide a sufficient safety margin with respect to the expected background rate and possibly enhance tracking and vertexing performance. The VTX collaboration has started the design of a fully pixelated VXD, called VTX, based on fast and highly granular Depleted Monolithic Active Pixel Sensors (DMAPS) integrated on light support structures. The two main technical features of the VTX proposal are the usage of a single sensor type over all the layers of the system and the overall material budget below 2% of radiation length, compared to the current VXD which has two different sensor technologies and about 3% of radiation length. A dedicated sensor (OBELIX), taylored to the specific needs of Belle II, is under development, evolving from the existing TJ-Monopix2 sensor. The time-stamping precision below 100 ns will allow all VTX layers to take part in the track finding strategy contrary to the current situation. The first two detection layers are designed according to a self-supported all-silicon ladder concept, where 4 contiguous sensors are diced out of a wafer, thinned and interconnected with post-processed redistribution layers. The outermost detection layers follow a more conventional approach with a cold plate and carbon fibre support structure, and light flex cables interconnecting the sensors. This document will review the context, technical details and development status of the proposed Belle II VTX.
%K Belle II
%K VXD
%K SVD
%K PXD
%K VTX
%K Upgrade
%K CMOS
%K DMAPS
%R 10.1016/j.nima.2023.168015
%U https://doi.org/10.1016/j.nima.2023.168015
%P 168015-5pp